Self-Aligned Patterning Using Spacer Layers for IC Alignment
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
As integrated circuit features approach the nanometer range, it becomes challenging to form precise patterns using a single photo-mask due to resolution limitations, leading to potential alignment errors and issues like short circuits, necessitating the use of multiple masks which require precise alignment.
Innovation Solution
The implementation of self-aligned multiple patterning using two or more masks with spacer materials to ensure proper alignment and prevent features from being too close, where one mask forms the initial pattern and a spacer layer is used to prevent overlap from subsequent masks, allowing for more tolerance in alignment errors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If multiple masks are used to form dense patterns, then pattern density is improved, but alignment precision deteriorates due to cumulative alignment errors between masks
Solution Approach 1:
The patent applies preliminary action by forming spacer layers on the substrate before depositing metal features. These spacers are created in advance to define the precise spacing and alignment of subsequent features, eliminating the need for multiple mask alignments. The spacers serve as pre-positioned guides that automatically ensure correct feature placement, thereby improving alignment precision while maintaining pattern density.
Solution Approach 2:
The patent introduces spacer layers as intermediary structures between the substrate and metal features. These spacers act as mediators that define the spatial relationships between features without requiring direct mask-to-mask alignment. By using spacers as the intermediary alignment reference, the patent eliminates cumulative alignment errors that would otherwise occur with multiple mask layers.
2Productivity
If features are placed closer together to increase density, then productivity is improved, but the risk of short circuits increases due to reduced spacing
Solution Approach 1:
The patent forms spacer layers in advance before metal deposition to pre-establish the minimum spacing between features. These spacers are deposited and patterned to ensure that even as features are placed closer together for higher density, the critical spacing is maintained. This preliminary spacing definition prevents short circuits while enabling increased circuit density and productivity.
Solution Approach 2:
The spacer layers serve a dual function: they act as spacing elements to prevent short circuits and simultaneously serve as alignment references for subsequent feature deposition. This self-service approach means the same structure that ensures reliability (spacing) also enables productivity (alignment accuracy for higher density), eliminating the trade-off between the two objectives.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method effectively prevents alignment errors and allows for the formation of precise patterns with increased tolerance to overlay errors, reducing the risk of short circuits and improving the fabrication process efficiency in forming integrated circuits.
Implementation Method 1
photo-masks are used to form a pattern into a photo-resist layer
Data Source
AI summary
A method for using self aligned multiple patterning with multiple resist layers includes forming a first patterned resist layer onto a substrate, forming a spacer layer on top of the first patterned resist layer such that spacer forms on side walls of features of the first resist layer, and forming a second patterned resist layer over the spacer layer and depositing a masking layer. The method further includes performing a planarizing process to expose the first patterned resist layer, removing the first resist layer, removing the second resist layer, and exposing the substrate.