Self-Aligned Redistribution Layer Fabrication for Memory Devices
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Solution Overview
Problem
The manufacturing of memory devices with staggered electrode configurations is hindered by the need for a redistribution layer (RDL), which increases manufacturing time and cost due to the requirement of patterning, etching, and filling processes.
Innovation Solution
Implementing self-aligned techniques to fabricate the RDL simultaneously with the interior electrodes, eliminating the need for separate patterning and filling of the RDL by etching cavities and filling them with electrode material to couple interior electrodes with selector devices.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a redistribution layer (RDL) is used to couple interior electrodes with selector devices in staggered configurations, then electrical connectivity is achieved, but manufacturing time and cost increase due to separate patterning, etching, and filling processes
Solution Approach 1:
The patent combines the formation of interior electrodes and redistribution layer into a single integrated process. The RDL is formed simultaneously with the interior electrodes through a unified patterning and deposition sequence, eliminating the need for separate RDL fabrication steps. This merging of processes directly reduces manufacturing time while maintaining the electrical connectivity function.
Solution Approach 2:
The patent performs preliminary patterning and material deposition steps that simultaneously define both the interior electrodes and the RDL structure. By preparing the patterned substrate and depositing materials in advance during the same process cycle, the invention eliminates subsequent separate processing steps, thereby reducing overall manufacturing time.
2Reliability
If a redistribution layer (RDL) is used to couple interior electrodes with selector devices, then electrical connectivity is achieved, but manufacturing cost increases due to additional processing steps
Solution Approach 1:
The patent merges the RDL formation with the interior electrode fabrication into a single process sequence. By combining patterning, material deposition, and structure formation steps, the invention reduces the total number of manufacturing operations required, thereby lowering labor and operational costs associated with separate RDL fabrication.
Solution Approach 2:
The patent creates a multi-functional process where a single patterning and deposition sequence simultaneously forms both the interior electrodes and the redistribution layer structure. This universal approach eliminates the need for dedicated RDL processing steps, reducing overall manufacturing complexity and cost.
3Reliability
If traditional RDL fabrication processes are used, then electrical connections are formed, but process complexity increases due to separate patterning, etching, and filling requirements
Solution Approach 1:
The patent combines multiple separate processes (patterning, etching, filling) into a single integrated fabrication sequence. The RDL and interior electrodes are formed simultaneously through unified process steps, dramatically reducing the number of discrete operations and simplifying the overall manufacturing workflow.
Solution Approach 2:
The patent performs all necessary patterning and material preparation steps in advance during the initial process cycle, before the final structure formation. This preliminary preparation eliminates the need for subsequent separate processing steps, thereby reducing process complexity while ensuring proper electrical connections.
Data Source
AI summary
Methods, systems, and devices for self-aligned techniques for forming connections in a memory device are described. A redistribution layer (RDL) for coupling an electrode of a capacitor of a memory cell with a corresponding selector device may be fabricated at a same time or stage as the electrode, using self-aligned techniques. When forming portions of a memory cell, a cavity for the electrode may be etched, and a portion of the RDL that extends from the electrode cavity to a corresponding selector device may also be selectively etched. The resulting cavities may be filled with an electrode material, which may form the electrode and couple the electrode to the corresponding selector device. The resulting memory device may support implementation of a staggered configuration for memory cells, and may include electrodes that share a crystalline structure with one or more corresponding portions of an RDL.