Self-Aligned Silicide Contacts for Semiconductor Power Devices

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Solution Overview

Problem

The semiconductor industry faces challenges in manufacturing power devices with reduced mask requirements, leading to increased costs, reduced production yields, and reliability issues due to tightened alignment tolerances and complex configurations, especially with miniaturization.

Innovation Solution

A self-aligned manufacturing method using a recessed trench contact configuration with silicide contact layers formed on semiconductor power devices, reducing the need for additional masks and enabling better electrical contacts with lower resistance connections, and integrating Schottky diodes and ESD protection circuits using CMP processes with limited additional masks.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If traditional multi-mask processes are used to fabricate power devices with complex configurations, then device functionality and electrical contacts can be achieved, but manufacturing costs increase and production yields decrease due to tightened alignment tolerances

Engineering Contradiction:
Improveproduction yieldVSAvoidnumber of masks
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent implements self-aligned processes where previously formed structures serve as alignment references for subsequent steps. Specifically, the gate trench and source trench are formed using the same mask pattern, and the silicide formation is automatically aligned to the trench structures. This self-service approach eliminates the need for additional alignment masks, reducing the total mask count from 5-7 to just 3 masks, thereby improving production yield while maintaining device complexity.

Inventive Principle:
Principle #25Self-service

2Ease of manufacture

If the number of masks is reduced to lower manufacturing costs, then production costs decrease, but achieving precise alignment and reliable electrical contacts becomes more difficult

Engineering Contradiction:
Improvemanufacturing costVSAvoidalignment accuracy
Core Design Contradiction:
Ease of manufactureVSManufacturing precision

Solution Approach 1:

The patent merges multiple functions into single mask patterns. The first mask simultaneously defines both the gate trench and source trench openings, eliminating the need for separate masks for each trench. Additionally, the self-aligned silicide formation process merges the alignment function into the physical structure itself, where the trench sidewalls serve as the alignment reference. This merging approach reduces manufacturing cost by cutting mask requirements from 5-7 to 3 masks while maintaining alignment accuracy through self-alignment mechanisms.

Inventive Principle:
Principle #5Merging (Combining)

3Reliability

If conventional silicide formation processes are used, then electrical contacts can be formed, but gate to source electrical shorts occur due to insufficient spacing between silicide regions

Engineering Contradiction:
Improveelectrical contact reliabilityVSAvoidelectrical short between gate and source
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

The patent applies preliminary action by forming the silicide layer selectively on the gate trench and source trench at different stages. The gate silicide is formed first, followed by source silicide formation after removing the sacrificial oxide. This preliminary sequencing ensures that when both silicides are present, they are physically separated by the oxide removal process, preventing electrical shorts while maintaining reliable electrical contacts. The harmful effect of electrical short is eliminated by the preliminary temporal separation of silicide formation.

Inventive Principle:
Principle #10Preliminary action

4Productivity

If device dimensions are miniaturized to improve device performance, then device functionality is enhanced, but alignment tolerance is tightened and production yields are reduced

Engineering Contradiction:
Improvedevice performanceVSAvoidalignment tolerance
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

The patent implements self-aligned processes where previously formed structures serve as alignment references for subsequent steps. Specifically, the gate trench and source trench are formed using the same mask pattern, and the silicide formation is automatically aligned to the trench structures. This self-service approach eliminates the need for additional alignment masks, reducing the total mask count from 5-7 to just 3 masks, thereby improving production yield while maintaining device complexity.

Inventive Principle:
Principle #25Self-service

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach reduces production costs, improves alignment accuracy, and enhances device performance by forming reliable contacts and integrating additional features without increasing mask requirements, thus addressing the limitations of existing methods.

Implementation Method 1

silicidation processes in recessed trenches to reduce required number of masks and further improve electrical contacts

Methodology Applied
Scientific EffectSilicidation: Chemical Bonding

Implementation Method 2

The un-reacted metal layer other than the silicide contact layer can be removed by applying a chemical removal process without applying a mask

Methodology Applied
Scientific EffectChemical removal: Chemical Bonding

Implementation Method 3

integrating Schottky diodes and ESD protection circuits using CMP processes

Methodology Applied
Scientific EffectChemical mechanical planarization: Abrasion

Data Source

PatentUS8779510B2Semiconductor power devices manufactured with self-aligned processes and more reliable electrical contacts
Publication Date: 2014.07.15 ALPHA & OMEGA SEMICONDUCTOR INC
  • US8779510B2 patent drawing
  • US8779510B2 patent drawing
  • US8779510B2 patent drawing

AI summary

This invention discloses semiconductor power device that includes a plurality of top electrical terminals disposed near a top surface of a semiconductor substrate. Each and every one of the top electrical terminals comprises a terminal contact layer formed as a silicide contact layer near the top surface of the semiconductor substrate. The trench gates of the semiconductor power device are opened from the top surface of the semiconductor substrate and each and every one of the trench gates comprises the silicide layer configured as a recessed silicide contact layer disposed on top of every on of the trench gates slightly below a top surface of the semiconductor substrate surround the trench gate.