Self-Aligned Trench MOSFET Structures for Low Shorting Resistance

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Solution Overview

Problem

Advanced trench MOSFET devices face challenges with increasing thermal resistance and robustness, particularly in handling higher current densities and preventing parasitic NPN bipolar transistor turn-on due to mask misalignment causing p body to source shorting resistance issues.

Innovation Solution

The development of a MOSFET device structure with self-aligned p+ body contact regions, featuring gate trenches and contact trenches of specific depths and widths, where the p+ body region is located equidistant from the gate trenches and has a higher dopant concentration, reducing shorting resistance and enhancing robustness.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If the die size is reduced to decrease resistance per square area, then the resistance decreases, but the thermal resistance increases

Engineering Contradiction:
Improveresistance per square areaVSAvoidthermal resistance
Core Design Contradiction:
Manufacturing precisionVSTemperature

Solution Approach 1:

The device structure is segmented into multiple parallel channels (gate trenches and contact trenches arranged in alternating fashion), which distributes the current path and reduces the overall resistance while maintaining a compact die area. This segmentation allows current to flow through multiple parallel paths rather than a single large area, achieving low resistance without increasing die size.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The invention transitions from planar device architecture to three-dimensional trench structures. Gate trenches and contact trenches extend vertically into the semiconductor substrate, utilizing the depth dimension to create multiple current pathways. This vertical dimensionality allows current to flow through parallel trench structures, reducing resistance without requiring increased horizontal die area.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Manufacturing precision

If the die size is reduced, then the resistance per square area decreases, but the robustness to handle higher current density deteriorates

Engineering Contradiction:
Improveresistance per square areaVSAvoidrobustness
Core Design Contradiction:
Manufacturing precisionVSReliability

Solution Approach 1:

The invention implements localized heavily doped p+ contact regions at specific positions within the trench structure, particularly at the bottom of contact trenches and adjacent to gate trenches. These localized high-doping regions create low-resistance contact points that enhance current handling capability. The non-uniform doping distribution provides high current density handling at critical locations while maintaining overall device compactness.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The p+ contact regions are formed in advance during the device fabrication process, creating pre-positioned low-resistance pathways before final device assembly. The heavily doped regions are implanted and diffused into specific locations (at the bottom of contact trenches and adjacent to gate trenches) to ensure optimal current distribution and robustness from the outset.

Inventive Principle:
Principle #10Preliminary action

3Ease of manufacture

If mask alignment is used for p body contact to trench, then the structure can be formed, but the p body to source shorting resistance increases due to misalignment

Engineering Contradiction:
Improvestructure formationVSAvoidp body to source shorting resistance
Core Design Contradiction:
Ease of manufactureVSManufacturing precision

Solution Approach 1:

The device structure is designed to be self-aligning, where the p+ contact regions automatically position themselves relative to the gate trenches through the trench geometry and doping diffusion processes. The contact trenches and gate trenches are formed in alternating fashion with specific depth relationships, creating inherent geometric constraints that ensure proper alignment without requiring additional mask alignment steps. This self-alignment mechanism eliminates the shorting resistance issue caused by mask misalignment.

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The invention incorporates a depth buffer between the contact trench and gate trench structures. The contact trench extends to a depth that is less than the gate trench depth but greater than a certain threshold, creating a safety margin that prevents misalignment issues. This depth differential acts as a cushion, ensuring that even with manufacturing variations, the p+ contact regions maintain proper positioning and low shorting resistance.

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This structure effectively minimizes p body to source shorting resistance and improves the robustness of MOSFET devices, enabling them to handle higher current densities and thermal management efficiently.

Implementation Method 1

the second doped contact region has a higher second type dopant concentration than the first doped contact region

Methodology Applied
Scientific EffectDoping: Dopants

Data Source

PatentUS10998438B2Self-aligned trench MOSFET structures and methods
Publication Date: 2021.05.04 IPOWER SEMICON
  • US10998438B2 patent drawing
  • US10998438B2 patent drawing
  • US10998438B2 patent drawing

AI summary

A MOSFET device structure is formed on a semiconductor wafer. The structure includes an array of plurality of MOS gate trenches and self-aligned p+ contact trenches that are formed in a p body region. Trench depth of MOS gate trenches are deeper than the self-aligned p+ contact trenches. P doped shield regions are formed under each MOS gate trench.