Self-Aligned Via Cut-Metal Layout for Tighter IC Spacing

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Solution Overview

Problem

The challenge in semiconductor manufacturing is achieving reduced spacing between IC features while managing complexity and cost, particularly in aligning conductive vias and lines, which is constrained by conventional photolithographic and cutting processes.

Innovation Solution

A self-aligned via formation method where a conductive via is formed before cutting the conductive layer, using a single mask to align the line end with the via, reducing the need for multiple masks and enhancing alignment precision.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Area of moving object

If conventional photolithographic masks and cut processes are used to reduce spacing between IC features, then feature density increases, but manufacturing complexity and cost increase due to requiring multiple masks and processes

Engineering Contradiction:
Improvefeature spacingVSAvoidmanufacturing process complexity
Core Design Contradiction:
Area of moving objectVSDevice complexity

Solution Approach 1:

The via is formed in advance before the cut-metal process, establishing a reference structure that enables self-alignment. This preliminary via formation allows the subsequent cut-metal operation to automatically align with the via location, eliminating the need for separate alignment processes and reducing overall manufacturing complexity while achieving reduced feature spacing

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The via structure serves as its own alignment reference for the cut-metal process. The cut-metal layer is aligned to the via opening, and the via automatically defines the alignment position, making the system self-aligning without requiring external alignment marks or additional photolithographic steps. This self-service mechanism reduces both process complexity and cost

Inventive Principle:
Principle #25Self-service

2Manufacturing precision

If multiple photolithographic masks are used for via and conductive layer formation, then alignment precision can be maintained, but production time and cost increase

Engineering Contradiction:
Improvevia to conductive layer alignmentVSAvoidproduction time
Core Design Contradiction:
Manufacturing precisionVSLoss of time

Solution Approach 1:

The via formation and cut-metal alignment processes are merged into a single self-aligned operation. The via opening serves as the alignment reference for the cut-metal layer, combining what would traditionally require separate photolithographic masking steps into one integrated process flow. This merging maintains alignment precision while reducing production time by eliminating redundant masking and alignment steps

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The via opening acts as an intermediary reference structure that mediates the alignment between the conductive layer and the underlying substrate features. Instead of directly aligning the conductive layer to substrate features through multiple photolithographic steps, the via opening serves as an intermediate alignment mediator that simplifies the process to a single alignment operation, reducing both time and maintaining precision

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS12476145B2Self-aligned cut-metal layer method
Publication Date: 2025.11.18 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US12476145B2 patent drawing
  • US12476145B2 patent drawing
  • US12476145B2 patent drawing

AI summary

Methods of forming self-aligned vias and devices having self-aligned vias are provided. In some embodiments, a method includes forming a first via on a conductive layer. A mask is formed over the conductive layer, and the mask has an opening overlying a portion of the conductive layer and at least partially overlying the first via. A first line end of the conductive layer is formed by selectively removing the portion of the conductive layer, with the first via being aligned with the first line end of the conductive layer.