Self-Aligned Via-to-Jumper Connections for Void-Free IC Power Delivery

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Solution Overview

Problem

Current technologies for forming vias and jumpers in integrated circuit (IC) devices suffer from defects such as voids at the via-jumper connection, leading to increased resistance and reduced power efficiency in the power delivery network.

Innovation Solution

The implementation of self-aligned via-to-jumper connections using a hybrid dielectric layer, which includes a dielectric liner and an additional dielectric liner with different dielectric materials, to achieve a good contact between the via and the jumper without major process changes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional via and jumper formation processes are used, then manufacturing simplicity is maintained, but defects such as voids occur at the via-jumper connection leading to increased resistance

Engineering Contradiction:
Improvevia-jumper connection qualityVSAvoiddielectric layer structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The dielectric layer is segmented into multiple portions with different dielectric constants. The first portion has a first dielectric constant and the second portion has a second dielectric constant that is different from the first. This segmentation allows optimization of the electric field distribution at the via-jumper connection interface, reducing void formation and improving connection reliability without requiring complex additional processing steps.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different regions of the dielectric layer are assigned different dielectric constants to optimize local properties. The dielectric layer has a first portion with a first dielectric constant and a second portion with a second dielectric constant, creating local quality variations that improve the via-jumper connection by reducing stress and preventing void formation at critical interfaces.

Inventive Principle:
Principle #3Local quality

2Productivity

If via and jumper dimensions are reduced for scaling, then device density increases, but maintaining good contact becomes more difficult

Engineering Contradiction:
Improvedevice densityVSAvoidvia-jumper contact alignment
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

The dielectric constant parameter is changed across different portions of the dielectric layer. By having a first portion with a first dielectric constant and a second portion with a second dielectric constant, the electric field distribution is optimized to maintain good via-jumper contact even as dimensions are reduced for scaling, thereby supporting higher device density without sacrificing manufacturing precision.

Inventive Principle:
Principle #35Parameter changes

3Loss of energy

If power delivery network resistance is reduced, then power efficiency improves, but requiring defect-free via-jumper connections which are difficult to achieve

Engineering Contradiction:
Improvepower delivery efficiencyVSAvoidvia-jumper connection integrity
Core Design Contradiction:
Loss of energyVSReliability

Solution Approach 1:

The dielectric layer is constructed as a composite structure with multiple portions having different dielectric constants. This composite dielectric structure optimizes the electric field distribution and mechanical stress at the via-jumper interface, preventing void formation and ensuring defect-free connections, thereby reducing power delivery network resistance and improving power efficiency.

Inventive Principle:
Principle #40Composite materials

Data Source

PatentUS20250142948A1Integrated circuit devices with self-aligned via-to-jumper connections
Publication Date: 2025.05.01 INTEL CORP
  • US20250142948A1 patent drawing
  • US20250142948A1 patent drawing
  • US20250142948A1 patent drawing

AI summary

An IC device with one or more transistors may also include one or more vias and jumpers for delivering power to the transistors. For instance, a via may be coupled to a power plane. A jumper may be connected to the via and an electrode of a transistor. With the via and jumper, an electrical connection is built between the power plane and the electrode. The via may be self-aligned. The IC device may include a dielectric structure at a first side of the via. A portion of the jumper may be at a second side of the via. The second side opposes the first side. The dielectric structure and the portion of the jumper may be over another dielectric structure that has a different dielectric material from the dielectric structure. The via may be insulated from another electrode of the transistor, which may be coupled to a ground plane.