Self-Aligned Via Formation Using Sacrificial Block
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Solution Overview
Problem
Conventional interconnect integration schemes for semiconductor devices face challenges with poor overlay alignment between vias and metal lines, leading to reliability and yield issues as process dimensions shrink, particularly due to the need for multi-step litho-etch patterning and the resulting small dielectric spaces between copper lines and vias.
Innovation Solution
A method employing a top level line pattern to form self-aligned vias by using a sacrificial block to create a via that aligns with both top and bottom conductive lines, eliminating the need for via level litho and reducing line-to-via alignment errors, contact resistance, and improving via reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If multi-step litho-etch patterning is used to print 64 nm pitch metal layers, then manufacturing capability is improved, but overlay alignment precision deteriorates
Solution Approach 1:
The method performs preliminary patterning of the first conductive lines and uses them as alignment references before forming the vias. The sacrificial block is positioned based on the pre-formed conductive lines, ensuring automatic alignment without requiring separate via-level lithography alignment steps.
Solution Approach 2:
The first conductive lines serve as self-alignment references for positioning the sacrificial block and subsequent via formation. The structure itself provides the alignment information needed, eliminating the need for external alignment processes and their associated overlay errors.
2Ease of manufacture
If conventional via formation is used, then manufacturing process is simplified, but via alignment reliability deteriorates
Solution Approach 1:
The sacrificial block acts as an intermediary structure that bridges the first and second conductive lines. It is positioned using the first conductive lines as references, and then used to define the via location, ensuring automatic alignment between the via and both conductive lines without requiring complex alignment processes.
Solution Approach 2:
The first conductive lines are formed preliminarily to serve as alignment references. The sacrificial block is then positioned based on these pre-formed lines, and the via is formed using the sacrificial block as a template, ensuring automatic alignment throughout the process.
3Area of moving object
If dielectric space between copper lines and vias is reduced, then interconnect density is improved, but contact resistance increases
Solution Approach 1:
The via is automatically aligned to the first and second conductive lines using the self-aligned sacrificial block method, ensuring optimal positioning that maximizes via current and minimizes contact resistance while maintaining compact interconnect density.
Data Source
AI summary
A method is presented for forming self-aligned vias by employing a top level line pattern. The method includes forming first conductive lines within a first dielectric material, recessing one conductive line of the conductive lines to define a first opening, filling the first opening with a second dielectric material, and forming a sacrificial block perpendicular to and in direct contact with a non-recessed first conductive line. The method further includes forming a single via directly underneath the sacrificial block by recessing the non-recessed first conductive line, removing the sacrificial block to define a second opening, and filling the second opening with a conductive material to define a second conductive line such that the single via aligns to both the non-recessed first conductive line and the second conductive line.