Self-Aligned Via Structure Using Selective Deposition
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Solution Overview
Problem
As semiconductor devices shrink, aligning vias with metal lines becomes challenging due to optical overlay control limitations, leading to issues like overlay shift and via critical dimension enlargement, which can result in performance degradation such as via-to-line breakdown and line-to-line leakage.
Innovation Solution
The development of self-aligned via structures through selective deposition methods, where an inhibitor is used to block dielectric deposition over conductive regions, allowing for precise alignment and etching selectivity, enabling the formation of reliable and efficient multi-layer interconnects even with lithography misalignment.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional damascene processes are used to form interconnects, then metal lines and vias can be formed, but alignment between vias and metal lines deteriorates as critical dimension and pitch scale down
Solution Approach 1:
The via structure uses self-aligned formation where the via automatically positions itself relative to the metal line through the damascene process sequence, eliminating the need for separate alignment operations. The via is formed by etching through the dielectric layer at the precise location of the metal line, ensuring automatic alignment as the structure serves its own positioning function.
Solution Approach 2:
The metal line is formed first in the lower dielectric layer, establishing a predetermined pattern that guides subsequent via formation. This preliminary action of creating the metal interconnect pattern before via formation ensures that vias will automatically align with the metal lines during the subsequent etching and filling processes.
2Quantity of substance
If critical dimension and pitch are scaled down to increase feature density, then more conductive lines can be packed, but alignment control between vias and metal lines deteriorates
Solution Approach 1:
The self-aligned via formation process eliminates dependence on optical overlay control by making the via automatically position itself relative to the metal line through the damascene process sequence, allowing high feature density to be achieved without compromising alignment precision.
Solution Approach 2:
The invention extracts the alignment function from the optical lithography process and embeds it within the damascene process sequence itself. By separating the alignment requirement from the lithography step and incorporating it into the structural formation process, the system achieves alignment through process design rather than optical control.
3Manufacturing precision
If optical overlay control is used for via alignment, then via positioning can be achieved, but control effectiveness ceases when pitch shrinks below 12 nm
Solution Approach 1:
The invention replaces the optical overlay control system with a mechanical/process-based self-alignment system. Instead of relying on optical lithography to position vias, the damascene process sequence mechanically ensures alignment through the sequential formation of metal lines and vias, eliminating the optical control bottleneck.
Solution Approach 2:
The via formation process serves its own alignment function by automatically positioning vias relative to metal lines through the etching and filling sequence, eliminating the need for external optical overlay control and enabling sub-12 nm pitch scaling.
4Ease of manufacture
If via alignment is not precise, then fabrication can proceed, but performance degradation occurs due to via-to-line breakdown and line-to-line leakage
Solution Approach 1:
The self-aligned via formation ensures precise positioning of vias relative to metal lines through the damascene process sequence, automatically achieving the alignment precision required to prevent via-to-line breakdown and line-to-line leakage while maintaining fabrication feasibility.
Solution Approach 2:
The selective etching process uses plasma chemistry to selectively remove dielectric material only at via locations, creating precise via holes that automatically align with metal lines. This selective removal process ensures proper via positioning and spacing to prevent electrical breakdown and leakage.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the reliability of semiconductor devices by maintaining self-alignment of vias with both top and bottom conductive regions, reducing RC performance and capacitance, and improving tolerance to lithography misalignment, thus addressing the challenges of shrinking feature sizes.
Implementation Method 1
selective deposition methods, where an inhibitor is used to block dielectric deposition over conductive regions
Data Source
AI summary
In one embodiment, a self-aligned via is presented. In one embodiment, an inhibitor layer is selectively deposited on the lower conductive region. In one embodiment, a dielectric is selectively deposited on the lower conductive region. In one embodiment, the deposited dielectric may be selectively etched. In one embodiment, an inhibitor is selectively deposited on the lower dielectric region. In one embodiment, a dielectric is selectively deposited on the lower dielectric region. In one embodiment, the deposited dielectric over the lower conductive region has a different etch rate than the deposited dielectric over the lower dielectric region which may lead to a via structure that is aligned with the lower conductive region.