Self-Aligned Conductive Vias for TDDB-Resistant Metallization
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Solution Overview
Problem
Current semiconductor device fabrication techniques face challenges in efficiently forming conductive vias between metallization layers, particularly in achieving precise alignment and minimizing time-dependent dielectric breakdown (TDDB).
Innovation Solution
The method involves forming conductive pillars in the first metallization layer, recessing them to create via openings, and filling these openings with conductive material using a self-aligned process to define conductive vias in the second metallization layer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional contact formation techniques are used to connect metal layers, then electrical connections can be established, but alignment precision is insufficient leading to time-dependent dielectric breakdown
Solution Approach 1:
Conductive pillars are formed in the first metallization layer before the formation of the second metallization layer. These pre-formed pillars serve as alignment references, ensuring that subsequent via openings in the second metallization layer are precisely positioned over the conductive pillars, thereby preventing misalignment and TDDB.
Solution Approach 2:
The conductive pillars automatically serve as the alignment target for via formation. The self-aligned process uses the pillars themselves as the reference feature, eliminating the need for separate alignment marks or additional lithography steps, thus improving both precision and efficiency.
2Productivity
If conventional via formation methods are used, then conductive connections can be made, but the process is time-consuming and less efficient
Solution Approach 1:
The formation of conductive pillars and subsequent via openings is merged into a single self-aligned process. The conductive pillars and via openings are formed simultaneously in one lithography and etch sequence, eliminating separate alignment and positioning steps, thus reducing fabrication time and improving productivity.
3Reliability
If precise via alignment is achieved through additional process steps, then TDDB risk is reduced, but device complexity increases
Solution Approach 1:
The conductive pillars automatically serve as the alignment target for via formation. The self-aligned process uses the pillars themselves as the reference feature, eliminating the need for separate alignment marks or additional lithography steps, thus improving both precision and efficiency.
Data Source
AI summary
A semiconductor device includes a conductive line and a conductive via contacting the conductive line. A first dielectric material contacts a first sidewall surface of the conductive via. A second dielectric material contacts a second sidewall surface of the conductive via. The first dielectric material includes a first material composition, and the second dielectric material includes a second material composition different than the first material composition.