Self-Assembled Etch Stop Layer for Semiconductor Fabrication
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Solution Overview
Problem
Current semiconductor fabrication techniques face issues with etch selectivity and uniformity due to the use of composite etch stop layers, leading to over etch, non-uniform etch, metal damage, and adhesion problems, which affect the resistive-capacitance delay time characteristic and yield in sub-micron semiconductor technology.
Innovation Solution
A semiconductor device and fabricating process utilizing self-assembled molecules as an etch stop layer, which react specifically with conductive materials and have a lower etch rate than dielectric materials, providing high selectivity and uniformity, and can also function as a diffusion barrier layer to prevent metal ion diffusion.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If a composite etch stop layer made of TEOS oxide layer overlying a silicon-based etch stop layer is used, then the overall thickness and dielectric constant are reduced, but the etch selectivity between the ELK layer and the etch stop layer is insufficient, causing over etch and non-uniform etch issues
Solution Approach 1:
The patent changes the material composition of the etch stop layer from conventional silicon-based materials (such as silicon carbide, silicon nitride, SiCN, SiOCN) to a boron-containing dielectric material. This parameter change in material composition provides significantly improved etch selectivity between the ELK layer and the etch stop layer, while maintaining uniform etch characteristics across the wafer surface, thereby resolving the contradiction between etch selectivity and etch uniformity.
2Manufacturing precision
If material with lower etch rate and dielectric coefficient is selected for the etch stop layer, then the R×C delay time characteristic is improved, but the etch selectivity with respect to the ELK layer is not satisfied, leading to over etch and non-uniform etch issues
Solution Approach 1:
The patent introduces a boron-containing dielectric material as the etch stop layer, changing the material parameter to achieve both low dielectric constant (improving R×C delay time) and high etch selectivity with respect to the ELK layer. This prevents over etch and non-uniform etch issues while maintaining the electrical performance requirements.
3Ease of manufacture
If a conventional silicon-based etch stop layer is used, then the fabrication process is straightforward, but the R×C delay time characteristic is not optimized and the layer thickness must be relatively large
Solution Approach 1:
The patent employs a boron-containing dielectric material that can be deposited using standard semiconductor fabrication techniques, maintaining ease of manufacture. Simultaneously, this material provides lower dielectric constant and controlled thickness capability, significantly improving the R×C delay time characteristic compared to conventional silicon-based etch stop layers.
4Manufacturing precision
If multiple layered structure including composite etch stop layer is implemented, then the R×C delay time characteristic is improved, but adhesion issues among layers arise
Solution Approach 1:
The patent uses a single-layer boron-containing dielectric material as the etch stop layer, segmenting the function from the complex multi-layer structure. This simplified structure eliminates adhesion interfaces between multiple layers, preventing adhesion issues while still achieving the desired low R×C delay time characteristic through the material's inherent low dielectric constant.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The self-assembled molecules improve etch selectivity and uniformity, reducing the resistive-capacitance delay time characteristic by 15-20% compared to prior art, and mitigate adhesion issues among layers, making the technology suitable for sub-micron and beyond semiconductor fabrication.
Implementation Method 1
a self-assembled protecting layer of a self-assembled molecule reacting with the reactive material formed over the part
Implementation Method 2
self-assembled molecule reacting with the reactive material
Implementation Method 3
the self-assembled molecules improve etch selectivity and uniformity
Implementation Method 4
can also function as a diffusion barrier layer to prevent metal ion diffusion
Data Source
AI summary
A semiconductor device and a fabricating process for the same are provided. The semiconductor device includes a base layer having a part of a reactive material; and a self-assembled protecting layer of a self-assembled molecule reacting with the reactive material formed over the part.