Self-Assembling Floating Gate Electrodes via Metal Agglomeration
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Solution Overview
Problem
Current methods for forming three-dimensional memory structures, such as vertical NAND strings, face challenges in efficiently creating discrete electrically conductive layers and control gates within the memory stack structures, which affects the memory device's performance and reliability.
Innovation Solution
A method involving the formation of an alternating stack of insulating and sacrificial material layers over a substrate, followed by the creation of memory openings with lateral recesses, and the deposition of a continuous metal layer that is annealed to separate into discrete metal portions, forming tunneling dielectric and semiconductor channels, and eventually functioning as control gates or floating gates.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If discrete electrically conductive layers and control gates are formed using conventional methods, then the memory structure can be created, but the manufacturing complexity and process difficulty increase
Solution Approach 1:
The continuous metal layer is segmented into discrete metal portions through the annealing process, which causes the metal to recede from regions without underlying sacrificial material and aggregate into discrete floating gate electrodes. This segmentation occurs automatically during thermal processing without requiring additional lithography or etching steps to create individual gates.
Solution Approach 2:
The sacrificial material layers are formed in advance with specific patterns and thicknesses that pre-determine the final positions and shapes of the floating gates. The continuous metal layer is deposited over these sacrificial structures before annealing, so the sacrificial material acts as a template that guides where the metal will remain after thermal receding.
2Manufacturing precision
If conventional deposition methods are used for metal layers, then the conductive layers can be formed, but precise control over the structure and conductivity within the memory stack is reduced
Solution Approach 1:
The patent replaces mechanical or lithographic patterning methods with a thermal field-based approach. Instead of using photolithography masks and etching to define gate positions, the invention uses thermal annealing to induce metal receding and aggregation, where the thermal energy causes the metal atoms to migrate and self-organize into discrete structures based on the underlying sacrificial material configuration.
Solution Approach 2:
The invention changes the physical state and distribution of the metal layer through controlled thermal parameters. By adjusting annealing temperature, time, and atmosphere, the metal layer transitions from a continuous deposited state to a receded and aggregated state, with precise control over the final metal distribution, thickness, and electrical properties of the floating gates.
3Reliability
If additional processing steps are added to improve memory device performance, then reliability increases, but productivity decreases
Solution Approach 1:
The patent combines multiple functions into the annealing step: it simultaneously removes the sacrificial material, recedes the metal layer to form discrete gates, and consolidates metal into properly positioned floating gate electrodes. What would traditionally require separate etching, deposition, and patterning steps is achieved in a single thermal processing operation, improving manufacturing efficiency.
Solution Approach 2:
The annealing process serves multiple purposes: it acts as a removal step for sacrificial material, a patterning step for the metal layer, and a formation step for the floating gate electrodes. This multi-functional processing step eliminates the need for multiple dedicated process steps, thereby maintaining productivity while achieving complex structural results.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables the efficient formation of three-dimensional memory devices with improved electrically conductive layers and control gates, enhancing memory performance and reliability by allowing for precise control over the structure and conductivity within the memory stack.
Implementation Method 1
performing an anneal to separate the continuous metal layer into discrete metal portions
Data Source
AI summary
Metal floating gate electrodes can be formed for a three-dimensional memory device by forming a memory opening having lateral recesses at levels of spacer material layers between insulating layers, depositing a continuous metal layer, and inducing diffusion and agglomeration of the metal into the lateral recesses to form discrete metal portions employing an anneal process. The metallic material can migrate and form the discrete metal portions due to surface tension, which operates to minimize the surface area of the metallic material. Optionally, two or more continuous metal layers can be employed to form discrete metal portions including at least two metals. Optionally, a selective metal deposition process can be performed to deposit additional metal portions including a different metallic material on the discrete metal portions. The metal floating gate electrodes can be formed without employing an etch process. A tunneling dielectric layer and a semiconductor channel can be subsequently formed.