Self-Biased Amplifier Circuit for Stable NF and K Value

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Solution Overview

Problem

Conventional semiconductor devices require an external terminal to control the bias current of amplifier circuits, which increases the mounting area and makes it difficult to achieve stable noise figure (NF) and K value characteristics due to temperature and manufacturing variations.

Innovation Solution

A semiconductor device configuration that includes an input and output terminal, power supply terminals, transistors, and resistance elements, allowing for self-biasing without external terminals by controlling the gate and drain terminals of the transistors through a resistance element, thereby stabilizing the NF characteristic and improving the K value.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If an external terminal is used to control the bias current of the amplifier circuit, then the bias current can be adjusted, but the mounting area increases and the stability of NF and K value characteristics deteriorates due to temperature and manufacturing variations

Engineering Contradiction:
Improvestability of NF and K value characteristicsVSAvoidmounting area
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The amplifier circuit uses self-biasing where the bias current is automatically controlled through the resistance element connected between gate and drain terminals, eliminating the need for external bias control terminals. The circuit self-regulates its operating point through the feedback path provided by the resistance element, achieving stable NF and K value characteristics without external intervention.

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The resistance element serves multiple functions simultaneously: it provides the feedback path for self-biasing, acts as part of the impedance matching network, and stabilizes the operating point against temperature and manufacturing variations. By merging these functions into a single element, the design reduces the number of external terminals while improving reliability.

Inventive Principle:
Principle #5Merging (Combining)

2Reliability

If the impedance of the first resistance element is kept low in the low-frequency region, then the stability against oscillation is improved, but the noise figure characteristic may deteriorate

Engineering Contradiction:
Improvestability against oscillationVSAvoidnoise figure characteristic
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The resistance element's impedance is designed to vary with frequency - having low impedance in the low-frequency region to prevent oscillation and higher impedance in the radio-frequency region to minimize noise figure degradation. This frequency-dependent parameter change allows the circuit to satisfy both stability and noise performance requirements simultaneously.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The resistance element exhibits different impedance characteristics at different frequency regions: low impedance at low frequencies for stability and higher impedance at RF frequencies for noise performance. This local quality variation allows the single element to optimize both contradictory requirements in their respective frequency domains.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS12341475B2Semiconductor device
Publication Date: 2025.06.24 SUMITOMO ELECTRIC INDUSTRIES LTD
  • US12341475B2 patent drawing
  • US12341475B2 patent drawing
  • US12341475B2 patent drawing

AI summary

A semiconductor device includes input and output terminals, first and second power supply terminals, first and second transistors, and a first resistance element. In the first transistor, gate and source terminals are respectively connected to the input terminal and the first power supply terminal, a drain terminal is connected to the second power supply terminal in direct current and to the output terminal, and the gate and drain terminals are connected via the first resistance element. In the second transistor, a source terminal is connected to the first power supply terminal, and gate and drain terminals are short-circuited at a node connected to the gate terminal of the first transistor in direct current. In a lower frequency region, an impedance of the first resistance element is lower than impedances of parasitic capacitances in the first transistor between the gate and drain terminals and between the gate and source terminals.