Self-Biased Folded Cascode Amplifier for Subthreshold Gain Boosting
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Solution Overview
Problem
Conventional operational amplifiers require multiple external biasing voltages, leading to increased power consumption, area overhead, and susceptibility to noise and cross-talk, while their gain is limited by signal-to-noise ratios and has a narrow dynamic range.
Innovation Solution
The design incorporates a resistive element between stages of the amplifier circuit to self-bias transistors, operating them in the subthreshold region, reducing the number of external biasing lines and enhancing DC gain without degrading AC performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If multiple external biasing voltages are used in conventional operational amplifiers, then the amplifier can achieve proper transistor biasing and operation, but power consumption increases and area overhead increases
Solution Approach 1:
The amplifier circuit uses its own output signal to automatically bias the input transistors through feedback paths. The output voltage is fed back to biasing nodes, allowing the circuit to self-regulate transistor operating points without external biasing voltages, thereby reducing power consumption and area overhead
Solution Approach 2:
The output node serves multiple functions: it provides the amplified output signal and simultaneously serves as a biasing source for the input transistors. This multi-functionality eliminates the need for separate biasing voltage supplies, reducing both power consumption and circuit area
2Reliability
If multiple external biasing voltages are used in conventional operational amplifiers, then the amplifier can achieve proper transistor biasing and operation, but susceptibility to noise and cross-talk increases
Solution Approach 1:
The circuit generates its own biasing signals from the output node, eliminating the need for external biasing lines that are susceptible to noise and cross-talk. The feedback-based biasing mechanism uses the circuit's own output, which is already processed and less vulnerable to external interference
3Ease of manufacture
If conventional operational amplifiers are designed with standard configurations, then the circuit implementation is straightforward, but gain is limited by signal-to-noise ratios and dynamic range is narrow
Solution Approach 1:
The patent employs transistors operating in the subthreshold region, changing the operating parameter regime to achieve higher intrinsic gain. This subthreshold operation allows for higher output impedance and improved voltage gain while maintaining compatibility with standard CMOS manufacturing processes
Solution Approach 2:
The amplifier is divided into multiple stages including differential input stage, gain stage, and output stage, each optimized for specific functions. This segmentation allows each stage to contribute to overall gain while managing noise and dynamic range requirements independently
4Area of stationary object
If the number of external biasing lines is reduced, then area overhead decreases and noise susceptibility reduces, but achieving proper transistor biasing becomes more difficult
Solution Approach 1:
The amplifier uses feedback from its own output to automatically establish proper biasing conditions. The output voltage is routed to biasing nodes through feedback paths, allowing the circuit to self-determine operating points without external control, thereby reducing area while maintaining proper biasing
Solution Approach 2:
Feedback paths are implemented to route output signals to biasing nodes, creating automatic biasing control. This feedback mechanism allows the circuit to adjust its own operating conditions based on output requirements, eliminating the need for external biasing lines while ensuring proper transistor operation
Data Source
AI summary
A first embodiment is directed to a circuit including a positive biasing circuit with a drive PMOS for biasing in subthreshold, a negative biasing circuit with a drive NMOS for biasing in subthreshold, and an amplification circuit coupled to the biasing circuits. The amplification circuit includes a first stage with a first boosting stage, a second stage with a second boosting stage, and a resistive element coupled between the first and second stages. A second embodiment is directed to a folded cascode operational amplifier wherein a value of the resistive element is selected to place at least one of a drive MOS in subthreshold. A third embodiment is directed to an integrated circuit with a resistive area neighboring a first boosting area and a second boosting area, the resistive area including a resistive element directly connected to a drive PMOS and a drive NMOS.