Self-Biased Charge Pump for Zero-Offset DLL and PLL Timing
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Solution Overview
Problem
Conventional Delay Locked Loops (DLLs) and Phase Locked Loops (PLLS) face challenges in maintaining zero or near-zero phase errors due to varying frequency and process/voltage/temperature (PVT) conditions, leading to reduced data eye opening and increased data error rates at high input/output data rates.
Innovation Solution
An adaptive zero-offset charge pump is introduced, which includes a self-biased differential amplifier and a replica charge pump stage, generating a control voltage to adjust bias inputs and reduce phase errors without consuming large amounts of power, by using a feedback loop to self-generate the pbias signal and track voltage variations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If conventional charge pumps are used in DLLs and PLLs, then the circuits can operate at high data rates, but phase errors increase due to varying frequency and PVT conditions
Solution Approach 1:
The patent implements a feedback mechanism where the charge pump circuit continuously monitors its own operation and adjusts its bias conditions accordingly. The feedback loop detects phase errors and dynamically compensates for PVT variations, enabling the circuit to maintain zero or near-zero phase errors across varying frequency and process/voltage/temperature conditions.
Solution Approach 2:
The patent dynamically changes operating parameters (bias voltages and currents) of the charge pump circuit based on detected conditions. By adjusting these parameters in response to PVT variations, the circuit maintains optimal performance and minimizes phase errors across different operating conditions without requiring external calibration.
2Reliability
If conventional charge pumps are used to maintain zero phase error, then sampling clocks can be placed at data eye centers, but power consumption increases
Solution Approach 1:
The charge pump circuit is designed to be self-regulating and self-adjusting. It automatically detects and corrects its own phase errors without requiring external intervention or high-power calibration circuits. The self-service mechanism enables the circuit to maintain zero phase error (improving data error rate) while consuming minimal power by only activating correction mechanisms when actually needed.
Solution Approach 2:
The patent employs periodic monitoring and correction cycles rather than continuous high-power operation. The charge pump circuit periodically checks phase alignment and makes adjustments only when deviations are detected, allowing sampling clocks to remain centered in data eyes while reducing overall power consumption compared to continuous high-power operation.
3Productivity
If conventional charge pumps are used, then clock distribution can be implemented, but loop bandwidth varies with PVT conditions
Solution Approach 1:
The patent uses feedback control to continuously monitor and adjust the charge pump operation, ensuring that loop bandwidth remains constant despite PVT variations. The feedback mechanism detects changes in operating conditions and dynamically compensates for them, maintaining stable clock distribution performance across process, voltage, and temperature variations.
Solution Approach 2:
The charge pump circuit implements dynamic biasing where operating points are continuously adjusted based on real-time conditions. This dynamic adaptation allows the circuit to maintain constant loop bandwidth and stable clock distribution across varying PVT conditions, transforming a static design into an adaptive system that responds to environmental changes.
Data Source
AI summary
A charge pump that generates a bias input to affect an output voltage of the charge pump is described herein. The charge pump may include a charge pump stage, a replica charge pump stage, and a self-biased differential amplifier. In some instances, the charge pump may be incorporated into a delay locked loop or a phase locked loop.