Self-Biased Folded Cascode Op-Amp for Subthreshold Gain Boosting
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Solution Overview
Problem
Conventional operational amplifiers require multiple external biasing voltages, leading to increased power consumption, larger fabrication areas, and susceptibility to noise and cross-talk, while also having limited signal-to-noise ratios and dynamic range.
Innovation Solution
The design of an operational amplifier with a positive biasing circuit, a negative biasing circuit, and an amplification circuit that includes a resistive element to self-bias transistors, allowing them to operate in the subthreshold region, reducing the need for external biases and enhancing DC gain and dynamic range.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If multiple external biasing voltages are used in conventional operational amplifiers, then the amplifier can achieve proper transistor biasing and operation, but power consumption increases and fabrication area expands
Solution Approach 1:
The amplifier circuit uses its own output signal to generate the biasing voltages through the resistive element and transistor network, eliminating the need for external biasing voltage sources. The circuit serves itself by using internal signal energy to establish proper operating points for all transistors.
Solution Approach 2:
The biasing function is merged with the signal amplification function. The same signal path that carries the amplified output also provides the biasing voltages through the resistive element, combining two previously separate functions into one integrated system.
2Reliability
If multiple external biasing voltages are used in conventional operational amplifiers, then the amplifier can achieve proper transistor biasing and operation, but the fabrication area increases
Solution Approach 1:
The amplifier circuit uses its own output signal to generate the biasing voltages through the resistive element and transistor network, eliminating the need for external biasing voltage sources. The circuit serves itself by using internal signal energy to establish proper operating points for all transistors.
Solution Approach 2:
The biasing function is merged with the signal amplification function. The same signal path that carries the amplified output also provides the biasing voltages through the resistive element, combining two previously separate functions into one integrated system.
3Reliability
If multiple external biasing voltages are used in conventional operational amplifiers, then the amplifier can achieve proper transistor biasing and operation, but susceptibility to noise and cross-talk increases
Solution Approach 1:
The amplifier circuit uses its own output signal to generate the biasing voltages through the resistive element and transistor network, eliminating the need for external biasing voltage sources. The circuit serves itself by using internal signal energy to establish proper operating points for all transistors.
4Productivity
If conventional operational amplifier configurations are used, then the amplifier achieves basic amplification function, but signal-to-noise ratio and dynamic range are limited
Solution Approach 1:
The invention changes the operating parameters of the transistors by using the resistive element to establish specific voltage relationships that optimize the transistors for subthreshold operation. This parameter change enables operation at lower voltages with improved signal-to-noise ratio while maintaining amplification function.
Data Source
AI summary
A first embodiment is directed to a circuit including a positive biasing circuit with a drive PMOS for biasing in subthreshold, a negative biasing circuit with a drive NMOS for biasing in subthreshold, and an amplification circuit coupled to the biasing circuits. The amplification circuit includes a first stage with a first boosting stage, a second stage with a second boosting stage, and a resistive element coupled between the first and second stages. A second embodiment is directed to a folded cascode operational amplifier wherein a value of the resistive element is selected to place at least one of a drive MOS in subthreshold. A third embodiment is directed to an integrated circuit with a resistive area neighboring a first boosting area and a second boosting area, the resistive area including a resistive element directly connected to a drive PMOS and a drive NMOS.