Self-Biased PLL Circuit for PVT-Stable Frequency Locking
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Solution Overview
Problem
Phase locked loops (PLLs) are sensitive to process, voltage, and temperature (PVT) variations, which affect their frequency band and jitter characteristics, making it challenging to reduce size and power consumption while maintaining performance, especially in portable devices.
Innovation Solution
A phase locking method and PLL that uses a self-biased voltage-current converter to generate a pump current, converter current, and oscillator current, which are proportional to each other, allowing the PLL to be insensitive to division ratio and PVT variations, and enabling operation in small size and low voltage with reduced operational range limits.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If a conventional PLL with divider is used to generate high frequency clock signals, then frequency multiplication capability is improved, but sensitivity to PVT variations worsens
Solution Approach 1:
The patent changes the operating parameters by using a current-controlled oscillator instead of a voltage-controlled oscillator, and employs a self-biased voltage-current converter that dynamically adjusts bias currents based on process, voltage, and temperature variations. This allows the PLL to maintain stable frequency output despite PVT changes by automatically adapting the oscillator current.
2Area of stationary object
If the size of PLL is reduced for portable devices, then power consumption and area are improved, but performance stability under PVT variations worsens
Solution Approach 1:
The patent implements a self-biased voltage-current converter that automatically generates appropriate bias currents without requiring external control circuits. The converter uses feedback from the oscillator current to self-adjust its output, eliminating the need for additional PVT compensation circuits and reducing overall PLL area while maintaining frequency stability.
3Adaptability or versatility
If division ratio is changed to generate different frequencies, then frequency flexibility is improved, but bandwidth and jitter characteristics vary
Solution Approach 1:
The patent makes the oscillator current dynamic by using a self-biased voltage-current converter that continuously adjusts the bias current based on real-time operating conditions. This dynamic current control allows the PLL to maintain consistent bandwidth and jitter characteristics across different division ratios and frequency outputs, unlike conventional static biasing approaches.
Data Source
AI summary
A phase locked loop includes a charge pump, a voltage-current converter, and a current controlled oscillator. The charge pump generates a pump current based on a bias voltage and a phase difference detection signal, in which the pump current is for adjusting a control voltage. The voltage-current converter is self-biased, generates the bias voltage, and converts the control voltage to a converter current. The current controlled oscillator generates an oscillator current based on the bias voltage, and generates an output signal that has a frequency corresponding to the oscillator current. The phase locked loop is insensitive to a division ratio and PVT variations.