Self-biasing Multi-reference for EEPROM Sense Amplifier
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
EEPROM memory devices face challenges in maintaining high reliability due to endurance degradation of memory cell current, excessive leakage current, and uncontrolled reference voltage/current levels, which affect sense amplifier performance and data reading accuracy.
Innovation Solution
A self-biasing multi-reference method that senses and stores the current on an unasserted bit-line as a voltage, generating a reference current for a sense amplifier to compare with the current of an asserted memory cell, thereby determining the charge state without external reference currents and minimizing leakage effects.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a fixed reference current is used for sense amplifier, then the circuit is simple, but it cannot compensate for bit-line leakage current and reference levels vary excessively with process and temperature
Solution Approach 1:
The patent implements self-biasing where the sense amplifier reference current is automatically adjusted based on the actual bit-line conditions. The reference current generation circuit uses feedback from the bit-line leakage current to self-regulate its output, eliminating the need for external compensation circuits while maintaining accuracy across process and temperature variations.
Solution Approach 2:
The patent employs feedback mechanisms where the sense amplifier monitors the bit-line current and adjusts its reference current accordingly. This feedback loop ensures that the reference current dynamically tracks the actual cell current despite leakage variations, process differences, or temperature changes, thereby maintaining high reliability without adding complex external reference circuits.
2Reliability
If full VDD precharge is applied to bit-line, then the read operation is reliable, but power consumption increases
Solution Approach 1:
The patent applies partial precharging to the bit-line, charging it to a voltage level sufficient for reliable read operations but below the full VDD potential. The self-biasing sense amplifier compensates for the reduced precharge level by dynamically adjusting its reference current, thereby maintaining read accuracy while significantly reducing the energy required for bit-line precharging.
3Measurement precision
If external reference current and leakage compensation circuits are used, then measurement precision is improved, but device complexity and power consumption increase
Solution Approach 1:
The patent integrates leakage compensation and reference current generation into the sense amplifier itself, allowing it to self-adjust to bit-line conditions without requiring separate external compensation circuits. This self-service approach maintains high measurement precision while minimizing device complexity by eliminating redundant external components.
Data Source
AI summary
Current appearing on a bit-line with no memory cells asserted may be used during a bit-line pre-charge time before a read is performed so as to bias a gate-drain shorted PMOS pull-up device connected between the bit-line and a power supply at a VDD potential. The capacitance connected to the gate of this PMOS pull-up device may be used to “store” the resultant gate-source voltage when the drain is disconnected once the pre-charge time is completed. Once the read operation starts, the current of the PMOS pull-up device that has the “stored” resultant gate-source voltage and the “stored” resultant gate-source voltage itself are re-used as the references, or multi-reference, for sensing the state of an asserted memory cell connected to the bit-line during the read operation thereof.