Self-Calibrated DC-DC Converter Frequency Control
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Solution Overview
Problem
In switched mode power supply (SMPS) systems, inherent delays in the control path lead to variations in the actual switching frequency, affecting the operation and efficiency of power converters, especially at high frequencies, resulting in increased power loss and potential electromagnetic interference.
Innovation Solution
A self-calibration mechanism is implemented in the controller to maintain a desired switching frequency by comparing the actual switching frequency with a reference signal, incrementing or decrementing a counter, and modifying the capacitance in a TON generator to adjust the timing circuit, thereby compensating for delays and maintaining the designed switching frequency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If the switching frequency is increased to improve power converter efficiency, then the power loss is reduced, but the electromagnetic interference increases and frequency variations become more significant
Solution Approach 1:
The patent implements a feedback mechanism where the controller monitors the actual switching frequency and compares it with the desired frequency. Based on this comparison, the controller adjusts the capacitance value in the TON generator to compensate for frequency deviations, thereby maintaining stable operation and reducing electromagnetic interference while preserving the benefits of high-frequency switching.
Solution Approach 2:
The patent dynamically changes the capacitance parameter in the TON generator based on the measured frequency deviation. By adjusting this parameter, the system can fine-tune the switching frequency to match the desired value,ไป่ reducing electromagnetic interference and power loss associated with frequency variations.
2Productivity
If the switching frequency is increased to improve efficiency, then the power converter performance is enhanced, but the frequency variations due to control path delays become more significant
Solution Approach 1:
The controller continuously monitors the actual switching frequency and feeds this information back to adjust the capacitance value. This closed-loop feedback mechanism compensates for frequency deviations caused by control path delays, maintaining high frequency accuracy even at elevated switching frequencies and thereby preserving efficiency.
Solution Approach 2:
The system performs self-calibration by automatically adjusting its own capacitance parameter based on the measured frequency deviation. This self-service mechanism eliminates the need for external calibration and ensures that the power converter maintains optimal performance and frequency accuracy across varying operating conditions.
3Measurement precision
If a self-calibration mechanism is implemented to maintain desired switching frequency, then frequency accuracy is improved, but the device complexity increases
Solution Approach 1:
The self-calibration mechanism operates autonomously within the controller, automatically measuring the switching frequency and adjusting the capacitance value without external intervention. This self-service approach simplifies the overall system architecture by eliminating the need for external calibration equipment while maintaining high frequency accuracy.
Solution Approach 2:
The patent adjusts a single critical parameter (capacitance value) to achieve frequency calibration. By focusing on changing this one parameter rather than redesigning the entire control architecture, the patent minimizes the increase in device complexity while still achieving significant improvements in frequency accuracy.
Data Source
AI summary
A circuit comprising a frequency to voltage converter having an input configured to receive a signal and an output coupled to a first node and another frequency to voltage converter having an input configured to receive a reference clock and an output coupled to a second node. The circuit also comprises a voltage source coupled between the first node and a third node, a voltage source coupled between the second node and a fourth node, a switch coupled between the first node and the third node, and a switch coupled between the second and fourth nodes. The circuit further comprises a comparator having an input coupled to the second node, another input coupled to the third node, and an output, a logic circuit having an input coupled to the comparator output and an output, and a counter having an input coupled to the logic circuit output and an output.