Self-Calibrating LDO Regulator for Stable SoC Power

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Solution Overview

Problem

Traditional LDO regulators face stability issues under low load current and high load capacitance scenarios, poor suppression of spurious emissions at high frequencies, and require significant circuit area, leading to inefficiencies and noise interference in mixed-signal SoC devices.

Innovation Solution

An unconditionally stable LDO regulator architecture with a low impedance output stage, utilizing a differential amplifier and digital error correction circuit to regulate both analog and digital supply voltages, independent of load current and capacitance, and implemented in a compact area without large capacitors.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If traditional LDO regulator architecture is used with given load currents and capacitances, then the regulator can maintain stability for a specific ILOAD/CLOAD ratio, but the stability degrades dramatically under low load current and high load capacitance scenarios

Engineering Contradiction:
ImprovestabilityVSAvoidload current and capacitance range
Core Design Contradiction:
ReliabilityVSAdaptability or versatility

Solution Approach 1:

The patent implements a dynamic stability compensation mechanism that automatically adjusts the compensation parameters based on the detected load current and capacitance conditions. The system transitions from static compensation to dynamic adaptation, allowing the regulator to maintain stability across varying load conditions without requiring redesign for each specific application scenario.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The invention changes the compensation parameters (such as pole-zero locations and gain margins) dynamically based on the operating conditions. By detecting the load current and capacitance levels, the system adjusts these parameters to maintain optimal stability margins across different ILOAD/CLOAD scenarios, resolving the contradiction between fixed stability and variable load adaptability.

Inventive Principle:
Principle #35Parameter changes

2Object-affected harmful factors

If traditional LDO regulator is designed for low output impedance at low frequencies, then the output impedance increases significantly at high frequencies above 1 MHz, resulting in poor suppression of spurious emissions

Engineering Contradiction:
Improvespurious emissions suppressionVSAvoidoutput impedance consistency
Core Design Contradiction:
Object-affected harmful factorsVSReliability

Solution Approach 1:

The patent implements a dynamic frequency compensation mechanism that adjusts the output impedance characteristics based on the frequency of the load. At high frequencies where spurious emissions occur, the system dynamically modifies the impedance profile to maintain low output impedance, thereby improving spurious emissions suppression while maintaining consistency across the frequency spectrum.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The invention introduces a feedback mechanism that monitors the output impedance at different frequencies and adjusts the compensation network accordingly. This feedback loop ensures that the output impedance remains consistently low across both low and high frequency ranges, effectively suppressing spurious emissions while maintaining reliability.

Inventive Principle:
Principle #23Feedback

3Reliability

If LDO regulator is designed with large capacitor structures for stability, then the circuit area increases significantly, making it unsuitable for integrated SoC applications

Engineering Contradiction:
ImprovestabilityVSAvoidcircuit area
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent extracts the large external capacitor structures from the integrated circuit design and replaces them with on-chip compensation networks that achieve equivalent or superior stability performance. By taking out the bulky external components and implementing compact on-chip alternatives, the system maintains stability while dramatically reducing the required circuit area for SoC integration.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The invention changes the compensation approach from relying on large external capacitance values to using precise on-chip resistor and capacitor combinations with optimized parameter values. This parameter optimization allows the system to achieve the same stability margins with much smaller physical dimensions, making it suitable for integrated applications.

Inventive Principle:
Principle #35Parameter changes

4Adaptability or versatility

If LDO regulator uses fixed compensation network for given application, then it cannot adapt to different frequencies of operation and capacitive loads, requiring redesign for each new application

Engineering Contradiction:
Improvefrequency and load adaptationVSAvoidapplication-specific redesign
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent implements a dynamic compensation network that automatically adapts to different operating frequencies and load conditions. The system detects the operating conditions and adjusts the compensation parameters in real-time, eliminating the need for application-specific redesign while maintaining optimal performance across diverse frequencies and load scenarios.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The invention creates a universal LDO regulator design that can handle multiple applications, frequency ranges, and load conditions through a single integrated compensation mechanism. This multi-functional approach allows the same circuit to serve various purposes without requiring redesign, reducing device complexity while enhancing adaptability.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS20130241504A1Self-calibrating, stable LDO regulator
Publication Date: 2013.09.19 TEXAS INSTRUMENTS INC
  • US20130241504A1 patent drawing
  • US20130241504A1 patent drawing
  • US20130241504A1 patent drawing

AI summary

A substantially unconditionally stable LOD regulator includes has first and second current paths. The first current path provides a reference current. The second current path receives an input voltage for developing a differential current with respect to the reference current based on the input voltage. The second current path has a sense resistor for sensing the differential current. A first current source biases the first and second current paths. A third current path senses the differential current and develops the input voltage in response thereto to control the differential current. A second current source biases the second current path. A first voltage follower circuit receives a first voltage on a first side of the sense resistor to provide an analog voltage output, and a second voltage follower circuit receives a second voltage on a second side of the sense resistor to provide a digital voltage output.