Self-Calibrating Resistor DAC for Linearity Without External Trimming
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Solution Overview
Problem
Existing DAC calibration methods are complex, costly, and inefficient due to process complexity, increased silicon wafer area, high power consumption, and the need for high-precision test devices, which results in high manufacturing and operational costs.
Innovation Solution
A self-calibration digital-to-analog conversion circuit with a resistor circuit, buffer amplifier, fine-tuning circuit, and correction switching circuit, utilizing a sampling and comparison time to automatically adjust output precision without external instruments, reducing complexity and cost.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If traditional calibration methods using eFuse or laser cuts are used to correct resistor arrays, then conversion linearity is improved, but manufacturing complexity and cost significantly increase
Solution Approach 1:
The patent implements self-calibration functionality within the DAC circuit itself, where the DAC automatically performs calibration operations using its own resources. The calibration circuit includes switches that can reconfigure the resistor array without external intervention, allowing the system to self-correct conversion linearity issues without requiring complex external manufacturing processes like eFuse or laser cuts
Solution Approach 2:
The patent changes the operational parameters of the resistor array by dynamically switching between different resistance configurations during calibration mode versus normal operation mode. This allows the same hardware to achieve calibration functionality without permanent manufacturing modifications, resolving the contradiction between precision improvement and manufacturing complexity
2Measurement precision
If an additional calibration DAC is used to compensate for output deviation, then calibration precision is improved, but silicon wafer area and power consumption increase
Solution Approach 1:
The patent makes the existing DAC circuit perform multiple functions: normal digital-to-analog conversion and self-calibration. By integrating calibration functionality into the same circuit structure used for conversion, the patent eliminates the need for a separate calibration DAC, thereby reducing silicon wafer area while maintaining calibration precision through intelligent circuit reconfiguration
Solution Approach 2:
The patent merges the calibration function with the main DAC circuit by sharing common components such as the resistor array, switches, and control logic. This consolidation allows the calibration functionality to be embedded within the existing circuit footprint rather than requiring additional dedicated hardware, thus reducing overall silicon area
3Measurement precision
If an additional calibration DAC is used for compensation, then calibration precision is improved, but power consumption increases
Solution Approach 1:
The calibration function is performed by the DAC itself using its own circuit resources rather than requiring a separate powered calibration DAC. The self-calibration mechanism reuses existing circuit components and only activates calibration mode when needed, significantly reducing continuous power consumption compared to having a dedicated calibration DAC operating consistently
Solution Approach 2:
The patent implements calibration as a periodic or on-demand operation rather than continuous operation. The DAC switches between normal conversion mode and calibration mode based on system requirements, consuming power only when calibration is needed rather than continuously, thus reducing overall power consumption while maintaining calibration precision
4Measurement precision
If full-code scanning with high-precision test devices is performed for calibration, then measurement accuracy is improved, but calibration time and testing cost increase
Solution Approach 1:
The patent eliminates the need for external high-precision test devices by implementing self-measurement capability within the DAC circuit. The circuit uses its own internal components to measure and compare output voltages during calibration, performing both the calibration and measurement functions internally without requiring external equipment, thus reducing calibration time and testing costs while maintaining accuracy
Solution Approach 2:
The patent implements a feedback mechanism where the DAC circuit measures its own output during calibration and uses this feedback information to automatically adjust and correct its performance. This closed-loop self-measurement and self-correction approach eliminates the need for external measurement devices and full-code scanning, significantly reducing calibration time while maintaining measurement accuracy through iterative internal adjustment
Data Source
AI summary
A self-calibration digital-to-analog converter (DAC) and a calibration method for DAC are provided. The circuit includes a resistor circuit, a buffer amplifier, a fine-tuning circuit, and a correction switching circuit. In normal operation mode, the resistor circuit receives the common voltage for conversion. In correction mode, the circuit performs self-correction in a sampling time and a comparison time. During the sampling time, the resistor circuit receives the reference voltage and first correction data, and the buffer amplifier input samples the voltage. During the comparison time, the resistor circuit receives the common connection voltage and second correction data, and the fine-tuning circuit adjusts the correction data until the buffer amplifier output voltage flips and records the correction value corresponding to the second correction data. With this self-correction mechanism, the circuit can output theoretically correct digital-to-analog conversion results under the reference voltage and common connection voltage.