Self-Clocking Data Extraction for Jitter-Tolerant Signal Sampling
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Solution Overview
Problem
Conventional Double Data Rate (DDR) data extraction methods fail in environments with poor signal quality, timing jitter, and signal skew, making reliable data transfer challenging, especially in trace data collection within development systems with compromised electrical characteristics.
Innovation Solution
A self-clocking data extraction method that is more tolerant of timing jitter and multiple edges per data bit, using oversampled data synchronous or asynchronous to the bit period, and employing edge detection with logical operations to extract data bits from signals with poor electrical characteristics.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional DDR data extraction methods are used, then data transfer speed is maintained, but data extraction reliability deteriorates in environments with poor signal quality, timing jitter, and signal skew
Solution Approach 1:
The patent implements dynamic data extraction by continuously adjusting the sampling window based on detected edge positions. Instead of using fixed timing, the system adapts to varying signal conditions by shifting the sampling window to align with actual data transitions, thereby maintaining reliability despite timing jitter and signal skew
Solution Approach 2:
The system employs feedback mechanisms by monitoring signal edges and using this information to adjust subsequent sampling operations. The detection of edge positions feeds back into the timing control logic, allowing the system to compensate for signal quality degradation and maintain accurate data extraction
2Adaptability or versatility
If conventional DDR data extraction methods are used, then system complexity is kept simple, but the system cannot handle multiple edges per data bit or significant timing variations
Solution Approach 1:
The patent transitions from single-edge detection to multi-edge detection within a sampling window. By considering multiple edges per data bit and using a broader temporal window for analysis, the system gains the ability to handle timing variations and multiple edges without requiring overly complex processing logic
Solution Approach 2:
The data extraction process is segmented into distinct phases: edge detection, window adjustment, and sampling. This segmentation allows each function to be optimized independently, managing complexity by breaking down the overall process into manageable, modular components
Data Source
AI summary
A self clocking data extraction method is shown that is tolerant of timing jitter, data skew and the presence of multiple edges per data bit. The data is sampled when the following criterion are met: There is at least one edge across any track (the clock assures this criteria is met), followed by no edges in any track for a defined period of time (T), and all edge activity must occur in a period of time less than T (to keep from detecting false samples). This method enables the handling of trace data signals with poor electrical characteristics that can not be recorded by methods known in the prior art.