Self-Correcting Internal Configuration Port Circuitry
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Solution Overview
Problem
Conventional integrated circuit devices face a single point of failure in configuration access, where memory cells in I/O interfaces or routing can be upset by single event upsets (SEUs) or multiple bit upsets (MBUs), rendering backup configuration access ports useless and preventing effective error mitigation.
Innovation Solution
Implementing self-checking and self-correcting internal configuration port circuitry with dual cores and ports, where one core monitors the other and takes control upon failure, allowing for single bit or multiple bit error correction without halting operation, and switching back once errors are fixed.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional single configuration access port is used, then device complexity is reduced, but reliability deteriorates due to single point of failure susceptibility to SEUs and MBUs
Solution Approach 1:
The configuration access system is segmented into multiple independent configuration access ports (primary and secondary), each capable of independently accessing configuration memory. This segmentation eliminates the single point of failure by ensuring that if one port is compromised by SEU or MBU, the other port remains functional and can continue configuration operations.
2Reliability
If redundant configuration access ports are added, then reliability improves against SEUs and MBUs, but device complexity and overhead increase
Solution Approach 1:
The configuration system implements self-monitoring and self-correction capabilities where the primary configuration access port monitors its own operational status and automatically switches to the secondary port upon detecting errors (SEUs or MBUs). This self-service mechanism eliminates the need for external monitoring circuits and voting logic, reducing overhead while maintaining high reliability.
3Reliability
If voting circuitry is implemented for port selection, then reliability improves through redundancy, but device complexity and overhead significantly increase
Solution Approach 1:
The system eliminates the need for external voting circuitry by implementing self-monitoring at the configuration access port level. Each port independently monitors its own operational integrity through built-in error detection mechanisms, and the primary port automatically takes over configuration functions when errors are detected, removing the requirement for complex voting logic to determine port status.
Solution Approach 2:
The invention extracts the monitoring and selection functions from external voting circuitry and integrates them directly into the configuration access port structure itself. This extraction eliminates the need for separate voting circuits while maintaining the ability to detect and respond to SEUs and MBUs, significantly reducing device complexity.
4Reliability
If triple module redundancy with voting circuitry is used, then reliability improves against SEUs and MBUs, but overhead and resource consumption increase
Solution Approach 1:
The invention extracts the redundancy function from complex triple module redundancy structures with voting circuitry, implementing a simplified dual-port configuration access system. Each port includes minimal error detection and correction capabilities, eliminating the need for extensive redundant modules and voting logic while maintaining effective protection against SEUs and MBUs.
Solution Approach 2:
The configuration access ports perform self-monitoring and self-correction using integrated error detection and correction code (ECC) mechanisms built into each port. This self-service approach eliminates the need for external monitoring resources and complex voting circuitry, significantly reducing overhead while maintaining high reliability through automatic detection and correction of soft errors.
Data Source
AI summary
Method and apparatus for self-checking and self-correcting memory states of a programmable resource is described. Programmable resource of an integrated circuit has a first core and a second core instantiated therein. A first internal configuration port and a second internal configuration port of the integrated circuit are respectively connected to the first core and the second core. The second core is coupled to the first core for monitoring operation of the first core with the second core, and the second core is configured to obtain control responsive to a failure of the first core or the first internal configuration port for a self-correcting mode.