Self-Forming Barrier Layer in Low-k Dielectric Interconnects

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Solution Overview

Problem

The increasing complexity and difficulty in fabricating barrier layers for semiconductor interconnects, particularly at smaller node dimensions, necessitates novel materials and processes to simplify the fabrication process and eliminate intermediate barrier layers while maintaining effective diffusion prevention between metals and dielectrics.

Innovation Solution

A method involving the exposure of a substrate with a metal surface to a dopant gas containing group III or V elements, followed by deposition of a silicon precursor and plasma to form a doped dielectric layer, which is then annealed to create a low-k dielectric barrier layer, eliminating the need for traditional PVD processes and intermediate barrier layers.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If traditional PVD processes with intermediate barrier layers (Ta/TaN) are used, then effective diffusion prevention is achieved, but fabrication complexity and difficulty increase at smaller node dimensions

Engineering Contradiction:
Improvediffusion preventionVSAvoidfabrication complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent removes the intermediate barrier layer (Ta/TaN) from the traditional Cu/Ta/TaN/SiO2 stack, extracting the problematic element that causes fabrication complexity while maintaining diffusion prevention through a modified dielectric layer with dopant enrichment at the interface

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent changes the chemical composition parameters of the dielectric layer by incorporating specific dopants (boron, phosphorous, nitrogen) and controlling their concentration gradients, particularly enriching the dopant content at the metal-dielectric interface to achieve diffusion barrier functionality without requiring separate barrier layers

Inventive Principle:
Principle #35Parameter changes

2Reliability

If traditional multi-layer barrier structures are used, then diffusion prevention is maintained, but interconnect thickness increases

Engineering Contradiction:
Improvediffusion preventionVSAvoidinterconnect thickness
Core Design Contradiction:
ReliabilityVSLength of stationary object

Solution Approach 1:

The patent merges the functions of the dielectric layer and the barrier layer into a single integrated structure. The dielectric layer is modified with dopant enrichment at the metal interface, combining the electrical insulation function with the diffusion barrier function, thereby eliminating the need for separate barrier layers and reducing overall thickness

Inventive Principle:
Principle #5Merging (Combining)

3Reliability

If dopant gas exposure and plasma deposition are used, then barrier properties are enhanced, but process time increases

Engineering Contradiction:
Improvebarrier propertiesVSAvoidprocess time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent employs continuous plasma-enhanced chemical vapor deposition (PECVD) processes where dopant gas exposure and silicon precursor deposition occur simultaneously or in closely integrated sequential steps within the same reactor chamber, maintaining continuous useful action without breaking vacuum or transferring wafers between chambers, thereby reducing overall process time

Inventive Principle:
Principle #20Continuity of useful action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach simplifies the interconnect fabrication process, reduces thickness, and effectively prevents metal diffusion into dielectric layers, thereby minimizing electrical shorts and device failures while enhancing the hardness and stiffness of the dielectric barrier layers.

Implementation Method 1

exposing a substrate having a metal surface thereon to a dopant gas to provide a layer of dopant on the metal surface

Methodology Applied
Scientific EffectAdsorption: Adsorption

Implementation Method 2

A doped dielectric layer is deposited by exposing the substrate to a silicon precursor, the dopant gas and a plasma to form a doped dielectric layer

Methodology Applied
Scientific EffectPlasma: Plasma

Implementation Method 3

The doped dielectric layer is annealed to form a dielectric barrier layer

Methodology Applied
Scientific EffectDiffusion: Diffusion

Implementation Method 4

The doped dielectric layer is annealed for a period in a range of about 60 min to about 120 min at a temperature less than about 500° C. in a molecular nitrogen (N2) atmosphere to form a dielectric barrier layer

Methodology Applied
Scientific EffectAnnealing: Annealing

Data Source

PatentUS11289369B2Low-k dielectric with self-forming barrier layer
Publication Date: 2022.03.29 APPLIED MATERIALS INC
  • US11289369B2 patent drawing
  • US11289369B2 patent drawing
  • US11289369B2 patent drawing

AI summary

A method of forming a low-k dielectric layer with barrier properties is disclosed. The method comprises forming a dielectric layer by PECVD which is doped with one or more of boron, nitrogen or phosphorous. The dopant gas of some embodiments may be coflowed with the other reactants during deposition.