Self-Powered Clock Input Buffer Rectifies AC to DC
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Solution Overview
Problem
Modern wireless transceivers face limitations in phase noise performance due to noise on the reference input clock, which degrades signal integrity and increases phase noise, and conventional solutions require more power, space, and cost.
Innovation Solution
A self-powered clock input buffer that rectifies alternating-current (AC) voltage into direct-current (DC) voltage to power the input buffer, allowing for a more tolerant and efficient synthesizer design, eliminating the need for bulky and power-hungry external regulators and large DC blocking capacitors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If an external regulator is used to provide power to the synthesizer and reference input clock, then the synthesizer can operate with stable power supply, but the regulator increases power consumption, occupies more space, and costs more
Solution Approach 1:
The clock input buffer is designed to self-power using its own input clock signal. The AC clock signal is rectified through a diode and filtered through a capacitor to generate the DC power supply voltage, eliminating the need for external power connections to the buffer. This self-service approach reduces overall system power consumption and removes the need for bulky external regulators.
Solution Approach 2:
The reference input clock signal serves dual functions: it provides the clock signal for phase noise reference and simultaneously serves as the power source for the clock input buffer through rectification. This multi-functionality reduces the number of separate power supply components needed in the system.
2Reliability
If an external regulator is used to provide power to the synthesizer and reference input clock, then the synthesizer can operate with stable power supply, but the regulator occupies more space on the PCB
Solution Approach 1:
The clock input buffer generates its own power supply voltage from the rectified and filtered clock signal, eliminating the need for external voltage regulator components on the PCB. This self-powered approach significantly reduces the PCB area required for power supply components.
Solution Approach 2:
The power supply function is extracted from the external regulator and integrated directly into the clock input buffer circuitry. By removing the separate external regulator component, the PCB area is reduced while maintaining the necessary power supply functionality through the rectifier-capacitor combination within the buffer.
3Reliability
If DC blocking capacitors are used in series with the reference input clock, then the DC component is blocked, but the capacitors require additional PCB space and increase the distance between components
Solution Approach 1:
The DC blocking function is extracted from separate series capacitors and integrated into the rectifier-capacitor power generation circuitry. The same capacitor that generates power also performs the DC blocking function, eliminating the need for additional DC blocking capacitors and reducing PCB area.
Solution Approach 2:
The DC blocking capacitor and power supply capacitor are merged into a single component. The capacitor serves dual purposes: blocking DC from the clock signal while simultaneously storing rectified voltage to power the buffer, thereby reducing component count and PCB space requirements.
4Reliability
If the reference input clock path is kept short to maintain signal integrity, then phase noise is reduced, but the placement of components is constrained
Solution Approach 1:
The clock input buffer generates its own power locally from the clock signal itself, eliminating the need for nearby external regulators and large capacitors. This self-powered architecture provides more placement flexibility while maintaining short clock paths for optimal signal integrity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The self-powered clock input buffer improves phase noise performance, reduces power consumption, and enables faster start-up times while allowing for a less expensive and compact regulator, thereby enhancing signal integrity and reducing phase noise without compromising other critical performance parameters.
Implementation Method 1
A self-powered clock input buffer that rectifies alternating-current (AC) voltage into direct-current (DC) voltage to power the input buffer
Data Source
AI summary
A method and system for self-powering a clock input buffer is disclosed. The system includes an input node adapted to receive an alternating current (AC) signal having an instantaneous voltage oscillating between a minimum voltage and a maximum voltage. The system includes a pass transistor having a voltage controlled terminal, a first transfer terminal, and a second transfer terminal. The first transfer terminal connects to the input node and the second transfer terminal connects to a power node. The circuit also includes a plurality of transistors adapted to form a logic gate connected to the power node, and having a sensing terminal connected to the input node and an output terminal connected to the voltage controlled terminal. The logic gate produces a control voltage on the output terminal in response to an input voltage on the sensing terminal. The circuit also includes an energy-storage element having a first terminal connected to the power node.