Self-reference sensing for ferroelectric memory cells

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Solution Overview

Problem

Ferroelectric RAM (FeRAM) sensing schemes often fail to account for variations within memory cells, leading to reduced reliability in sensing operations and increased power consumption due to frequent refresh operations in volatile memory devices.

Innovation Solution

A self-reference sensing scheme is implemented, where a cell-specific voltage reference is generated based on the read operation of a memory cell, allowing for a wider read margin and improved reliability by using two access lines to apply and compare voltages, thereby accounting for parasitic capacitance and ferroelectric material properties.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional sensing schemes are used for FeRAM, then device complexity is reduced, but reliability of sensing operations deteriorates due to unaccounted variations within memory cells

Engineering Contradiction:
Improvereliability of sensing operationsVSAvoidcomplexity of sensing scheme
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The sensing operation is divided into two separate phases: a first sensing operation that reads the memory cell through a first access line, and a second sensing operation that reads the same cell through a second access line. This segmentation allows independent measurement of variations in each access line, enabling compensation for parasitic capacitance and cell-specific variations, thereby improving sensing reliability without requiring complex additional circuitry.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The voltage measured during the first sensing operation is used as a reference to compensate for variations in the second sensing operation. By comparing the two measurements and using the first as a reference for the second, the system creates a feedback mechanism that accounts for cell-specific variations and parasitic effects, improving reliability while maintaining relatively simple circuit architecture.

Inventive Principle:
Principle #23Feedback

2Speed

If volatile memory architecture is used, then faster read/write speeds are achieved, but power consumption increases due to frequent refresh operations

Engineering Contradiction:
Improveread/write speedVSAvoidpower consumption
Core Design Contradiction:
SpeedVSUse of energy by moving object

Solution Approach 1:

The memory cell performs self-diagnosis by conducting sensing operations through both access lines and comparing the results. The cell-specific reference voltage generated during the first sensing operation enables the cell to identify and compensate for its own variations and degradation, reducing the need for external refresh operations. This self-service mechanism maintains fast access speeds while reducing power consumption by eliminating frequent mandatory refreshes.

Inventive Principle:
Principle #25Self-service

3Measurement precision

If cell-specific variations are not accounted for, then sensing scheme complexity is reduced, but measurement precision deteriorates

Engineering Contradiction:
Improveprecision of logic state determinationVSAvoidcomplexity of voltage reference generation
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

Before determining the final logic state, the system performs a preliminary sensing operation through the first access line to generate a cell-specific reference voltage. This preliminary action characterizes the specific memory cell's properties and variations, which are then used to compensate for these variations in the subsequent sensing operation through the second access line, thereby improving measurement precision without requiring complex external reference circuits.

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enhances the reliability of determining the logic state of ferroelectric memory cells and reduces the need for frequent refresh operations, leading to lower power consumption and improved performance compared to other memory architectures.

Implementation Method 1

FeRAM may use similar device architectures as volatile memory but may have non-volatile properties due to the use of a ferroelectric capacitor as a storage device

Methodology Applied
Scientific EffectFerroelectricity:

Implementation Method 2

allowing for a wider read margin and improved reliability by using two access lines to apply and compare voltages, thereby accounting for parasitic capacitance and ferroelectric material properties

Methodology Applied
Scientific EffectParasitic capacitance: Parasitic Capacitance

Data Source

PatentUS11848038B2Self-reference sensing for memory cells
Publication Date: 2023.12.19 MICRON TECHNOLOGY INC
  • US11848038B2 patent drawing
  • US11848038B2 patent drawing
  • US11848038B2 patent drawing

AI summary

Methods, systems, and apparatuses for self-referencing sensing schemes are described. A cell having two transistors, or other switching components, and one capacitor, such as a ferroelectric capacitor, may be sensed using a reference value that is specific to the cell. The cell may be read and sampled via one access line, and the cell may be used to generate a reference voltage and sampled via another access line. For instance, a first access line of a cell may be connected to one read voltage while a second access line of the cell is isolated from a voltage source; then the second access line may be connected to another read voltage while the first access line is isolate from a voltage source. The resulting voltages on the respective access lines may be compared to each other and a logic value of the cell determined from the comparison.