Self-Referenced MRAM Cells for High-Temperature Operation

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Solution Overview

Problem

Conventional MRAM devices with thermally assisted switching suffer from a limited write operation temperature window due to manufacturing variability and the need for tight tolerance control, leading to reduced yields and higher costs.

Innovation Solution

The implementation of self-referenced MRAM cells without a reference layer, allowing operation above 400°C and reducing sensitivity to manufacturing variability by using a magnetic tunnel junction with a sense layer and a storage layer, where the sense layer has low coercivity and the storage layer has high coercivity, and a pinning layer that stabilizes the storage magnetization below a threshold temperature.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional MRAM cells with reference layer and antiferromagnetic layer are used, then data retention is ensured below threshold temperature, but operation temperature window is limited and manufacturing tolerance control is required

Engineering Contradiction:
Improvedata retentionVSAvoidoperation temperature window
Core Design Contradiction:
ReliabilityVSTemperature

Solution Approach 1:

The patent removes the reference layer and its associated antiferromagnetic pinning layer from the MRAM cell structure. This extraction eliminates the threshold temperature limitation imposed by the antiferromagnetic layer, allowing operation above 400°C while maintaining data retention through the self-referenced read mechanism that compares one cell against another without requiring a pinned reference layer

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

Instead of using a pinned reference layer to define a fixed resistance reference, the invention inverts the approach by using an active read mechanism that dynamically compares cell states. The read operation itself generates the reference comparison, eliminating the need for a statically pinned reference layer with threshold temperature constraints

Inventive Principle:
Principle #13The other way round (Inversion)

2Manufacturing precision

If tight tolerance control is implemented during manufacturing, then device performance is improved, but manufacturing yields decrease and costs increase

Engineering Contradiction:
Improvetolerance controlVSAvoidmanufacturing yields
Core Design Contradiction:
Manufacturing precisionVSProductivity

Solution Approach 1:

The self-referenced MRAM cell structure inherently compensates for manufacturing variations through its differential read mechanism. The cell compares its state against another cell in the same array, automatically canceling out common-mode variations from manufacturing processes. This self-compensation eliminates the need for tight external tolerance control, improving yields without sacrificing performance

Inventive Principle:
Principle #25Self-service

3Speed

If sense layer with low coercivity and storage layer with high coercivity are used, then writing speed is improved, but temperature stability above threshold temperature is reduced

Engineering Contradiction:
Improvewriting speedVSAvoidmagnetization stability
Core Design Contradiction:
SpeedVSStability of the object's composition

Solution Approach 1:

The patent changes the fundamental parameter of how magnetization stability is achieved. Instead of relying on antiferromagnetic exchange bias with a threshold temperature, the invention uses spin-transfer torque and spin-orbit torque mechanisms that can maintain stable magnetization at temperatures above 400°C. The distinct coercivity values of sense and storage layers enable fast writing while the new stabilization mechanism ensures high-temperature stability

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This solution expands the operation temperature window, increases manufacturing yields, and reduces manufacturing costs by eliminating the need for tight tolerance control and external reference layers, enabling faster writing and reading speeds.

Implementation Method 1

discovery of magnetic tunnel junctions having a strong magnetoresistance at ambient temperatures

Methodology Applied
Scientific EffectMagnetoresistance: Magnetoresistance

Implementation Method 2

a reference layer is typically exchange biased by an adjacent antiferromagnetic layer, which is characterized by a threshold temperature TBR of the antiferromagnetic layer. Below the threshold temperature TBR, a magnetization of the reference layer is pinned by the exchange bias

Methodology Applied
Scientific EffectExchange bias:

Implementation Method 3

Writing is carried out by heating the MRAM cell above the threshold temperature TBS (but below TBR), thereby unpinning the magnetization of the storage layer to allow writing

Methodology Applied
Scientific EffectThermal unpinning:

Implementation Method 4

the other ferromagnetic layer, the so-called storage layer, is characterized by a magnetization with a direction that is varied upon writing of the device, such as by applying a magnetic field

Methodology Applied
Scientific EffectMagnetic field: Magnetic Field

Data Source

PatentUS9054029B2Memory devices with magnetic random access memory (MRAM) cells and associated structures for connecting the MRAM cells
Publication Date: 2015.06.09 ALLEGRO MICROSYSTEMS LLC
  • US9054029B2 patent drawing
  • US9054029B2 patent drawing
  • US9054029B2 patent drawing

AI summary

A memory device includes a magnetic layer including a plurality of magnetic random access memory (MRAM) cells, a first conductive layer, a layer including a strap connecting MRAM cells included in the plurality of MRAM cells, and a second conductive layer. The first conductive layer includes a conductive portion electrically connected to at least one of the plurality of MRAM cells, and a field line configured to write data to the at least one of the plurality of MRAM cells. The second conductive layer includes a conductive interconnect electrically connected to the at least one of the plurality of MRAM cells, where the magnetic layer is disposed between the first conductive layer and the second conductive layer. At least one of the plurality of MRAM cells is directly attached to the second conductive layer and the strap.