Self-Selecting Chalcogenide Memory Cell for Sneak Current Suppression
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Solution Overview
Problem
Existing memory apparatuses with cross-point structures face challenges in increasing memory capacity due to complex manufacturing processes and sneak currents, and the aspect ratio of memory cells limits integration and durability.
Innovation Solution
A self-selecting memory device with a structure that includes a first and second electrode, an amorphous chalcogenide-based memory layer, and crystalline chalcogenide-based intermediate layers, which functions as both a selector and memory, preventing diffusion of memory layer elements and reducing sneak currents.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-generated harmful factors
If a 2-terminal selector is connected in series to a memory device to prevent sneak current, then sneak current is reduced, but the aspect ratio of the memory cell increases and manufacturing complexity increases
Solution Approach 1:
The patent merges the selector function and memory function into a single integrated device. The memory layer material is designed to exhibit both threshold switching behavior (selector function) and memory storage capability (memory function), eliminating the need for separate 2-terminal selector components and reducing manufacturing complexity while preventing sneak current.
Solution Approach 2:
The memory layer is designed to perform multiple functions simultaneously: it acts as both the storage element and the selection switch. The material properties are engineered to provide threshold switching characteristics that enable selective activation, while also storing data states, thereby reducing device complexity and improving integration.
2Object-generated harmful factors
If a 2-terminal selector is connected in series to a memory device to prevent sneak current, then sneak current is reduced, but the aspect ratio of the memory cell increases
Solution Approach 1:
By combining the selector and memory functions into a single layer structure, the patent eliminates the vertical stacking required for separate selector and memory components. This merging reduces the overall aspect ratio of the memory cell while maintaining effective sneak current prevention through the threshold switching characteristics of the unified memory layer.
3Quantity of substance
If memory capacity is increased by reducing pitch between electrodes, then memory capacity increases, but manufacturing precision requirements increase
Solution Approach 1:
The patent utilizes changes in material parameters and structural configurations to achieve higher memory capacity. By optimizing the memory layer material composition, thickness, and interface structures, the patent enables increased storage capacity without proportionally reducing electrode pitch, thereby maintaining manufacturing precision requirements at acceptable levels.
4Reliability
If crystalline chalcogenide-based intermediate layers are added between electrodes and memory layer, then durability is improved by preventing diffusion, but device complexity increases
Solution Approach 1:
The patent introduces crystalline chalcogenide-based intermediate layers as intermediary structures between the electrodes and the amorphous memory layer. These intermediate layers serve as diffusion barriers that prevent harmful material migration, thereby improving device durability and reliability while the crystalline structure provides stable electrical characteristics.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enhances memory device durability and integration by allowing for higher memory capacity without separate switching devices, improving endurance and reducing electrode material diffusion.
Implementation Method 1
a memory layer between the first and second electrodes, having an ovonic threshold switching characteristic, having a changeable threshold voltage that changes according to a polarity of and a strength of an applied voltage
Implementation Method 2
at least one of a first intermediate layer between the first electrode and the memory layer and including a first crystalline chalcogenide-based material and a second intermediate layer between the second electrode and the memory layer and including a second crystalline chalcogenide-based material
Data Source
AI summary
Provided are a memory device and a memory apparatus including the same. The memory device includes a first electrode, a second electrode spaced apart from the first electrode, a memory layer between the first and second electrodes, having ovonic threshold switching characteristic, having a threshold voltage that changes according to a polarity of and/or a strength of an applied voltage, and including an amorphous chalcogenide-based material, and at least one intermediate layer including a crystalline chalcogenide-based material between at least one of the first and second electrodes and the memory layer. The memory device may include a first intermediate layer disposed between the first electrode and the memory layer and including a crystalline chalcogenide-based material and/or a second intermediate layer between the second electrode and the memory layer and including a crystalline chalcogenide-based material.