Self-Selecting Memory Layer for Semiconductor Devices
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Solution Overview
Problem
Current semiconductor devices face challenges in miniaturization, low power consumption, and multi-functionality, particularly in memory devices that require complex circuit configurations and separate elements for memory and selection functions, leading to increased complexity and manufacturing costs.
Innovation Solution
A semiconductor device with a self-selecting memory layer that functions as both a memory device and a selector/switch, utilizing an insulating material layer with dopants that create shallow and deep traps to control conductivity based on applied voltage, allowing for data storage and path disconnection/connection between electrode layers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If separate memory elements and selector elements are used in conventional memory devices, then the memory function and selection function can be independently optimized, but the circuit complexity and manufacturing cost increase
Solution Approach 1:
The patent combines the memory element and selector element into a single integrated structure. The memory device includes a first electrode, a second electrode, and a memory layer between them that simultaneously provides both memory storage capability and selector switching capability. This merging eliminates the need for separate memory and selector elements, reducing circuit complexity while maintaining functional reliability.
Solution Approach 2:
The memory layer is designed to perform multiple functions: it serves as both the memory element for data storage and the selector element for circuit switching. By endowing the memory layer with dual functionality, the patent reduces the overall number of components needed in the memory device, thereby simplifying the circuit configuration without compromising the reliability of either memory or selection operations.
2Reliability
If conventional memory devices use separate memory and selector elements, then each element can be optimized independently, but the manufacturing process becomes more complex and costly
Solution Approach 1:
The patent merges the memory element and selector element into a single integrated memory layer structure. This consolidation reduces the number of fabrication steps required, as separate processing for distinct memory and selector elements is eliminated. The manufacturing process becomes simpler and more cost-effective while still achieving reliable operating characteristics through the dual-functional memory layer design.
3Device complexity
If a self-selecting memory layer is used to perform both memory and selection functions, then the number of circuit elements is reduced and manufacturing is simplified, but the material structure and doping requirements become more complex
Solution Approach 1:
The patent implements local quality by creating specific dopant distributions within the memory layer. A first dopant is introduced to generate deep traps, while a second dopant is introduced to generate shallow traps. Each dopant is positioned and concentrated in specific regions of the memory layer to achieve the desired electrical characteristics. This localized dopant engineering enables the memory layer to exhibit both memory and selector functions with precise control over its electrical properties.
Solution Approach 2:
The memory layer is constructed as a composite material system incorporating multiple dopants with different properties. The combination of first dopant (creating deep traps) and second dopant (creating shallow traps) within the same memory layer creates a composite structure that achieves dual functionality. This composite approach allows the memory layer to simultaneously provide memory storage capability and selector switching capability, reducing overall device complexity while managing manufacturing precision requirements through material composition rather than structural complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution simplifies the manufacturing process, reduces circuit elements, and enhances integration by enabling a single self-selecting memory layer to perform both memory and selection functions, minimizing current leakage and improving operating characteristics.
Implementation Method 1
a first dopant that creates a shallow trap providing a path for conductive carriers in the insulating material layer
Implementation Method 2
a second dopant that is movable in the insulating material layer according to a polarity of a voltage applied to the first and second electrode layers
Implementation Method 3
conductive carriers in a deep trap in the insulating material layer transition to a shallow trap while having different resistance states according to movement of ions
Data Source
AI summary
A semiconductor memory may include at least one memory cell. The memory cell may include: a first electrode layer; a second electrode layer separated from the first electrode layer, wherein the first and second electrode layers are coupled to receive a voltage applied to the first and second electrode layers; and a self-selecting memory layer interposed between the first electrode layer and the second electrode layer and configured to store data and operable to disconnect or connect a conducting path between the first electrode layer and the second electrode layer, to respond to the voltage applied to the first and second electrode layers, wherein the self-selecting memory layer includes an insulating material layer, a first dopant that creates a shallow trap providing a path for conductive carriers in the insulating material layer, and a second dopant that is movable in the insulating material layer according to a polarity of the voltage applied to the first and second electrode layers.