Self-Synchronized Pulse Communication Without CDR Circuitry
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Modern devices, especially those in the IoT, face challenges with space and power constraints due to the need for clock and data recovery (CDR) circuitry for synchronization in communications systems.
Innovation Solution
A method that segments data blocks into sub-blocks, inverts those with more high bits, and transmits pulses indicating high bits, delays, and inversion status, allowing self-synchronization without requiring synchronization circuitry, thus saving space and power.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If clock and data recovery (CDR) circuitry is used for synchronization, then communication reliability is improved, but device space and power consumption increase
Solution Approach 1:
The patent extracts the synchronization function from dedicated CDR circuitry and implements it through data encoding/decoding operations. The transmitter embeds synchronization information within the data stream itself, and the receiver extracts this information through pulse counting and pattern recognition, eliminating the need for separate synchronization hardware.
Solution Approach 2:
The data transmission system performs multiple functions simultaneously: data transmission, synchronization, and timing recovery all occur through the same data stream and using the same basic circuitry. The pulse-based encoding scheme serves both as data carriers and as synchronization markers.
2Reliability
If clock and data recovery (CDR) circuitry is used for synchronization, then communication reliability is improved, but device area increases
Solution Approach 1:
The patent removes the need for complex CDR circuitry by extracting synchronization functionality into the data protocol layer. Simple pulse counters and pattern detectors replace phase-locked loops and charge pumps, dramatically reducing the hardware area required for synchronization.
Solution Approach 2:
The system uses simplified pulse counting and pattern recognition instead of complex analog CDR circuits. The synchronization function is copied into the digital domain where it can be implemented with minimal logic elements rather than occupying significant analog circuit area.
3Measurement precision
If traditional synchronization methods are used, then timing accuracy is maintained, but system complexity increases
Solution Approach 1:
The data stream is segmented into discrete pulse groups where each group represents specific information. This segmentation allows the receiver to process timing information in manageable units, maintaining accuracy through structured data organization rather than complex continuous processing.
Solution Approach 2:
The data stream self-synchronizes through its own structure. The pulse patterns and intervals within the transmitted data automatically provide timing reference information to the receiver, eliminating the need for external clock signals or complex synchronization protocols.
Data Source
AI summary
A method for transmitting a data block begins with segmenting the data block into a number of data sub-blocks. Each data sub-block where a number of high bits is greater than a number of low bits is then inverted. The data sub-blocks are then grouped into sets of data sub-blocks. For each set of data sub blocks, a number of pulses indicative of a number of high bits in each one of the data sub-blocks in the set is transmitted, there is a delay, and a number of pulses indicative of each high bit in each data sub-block of the set of data sub-blocks is transmitted followed by a delay. Finally, a number of pulses indicative of which ones of the data sub-blocks were inverted is transmitted.