Self-Test RF Signal Circuit Using Divided LO for SSB Calibration
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Solution Overview
Problem
Current Built-In-Self-Test (BIST) solutions for high-frequency integrated circuits, such as those used in automotive radar sensors, are inadequate for accurate calibration and fault detection due to limitations in generating suitable test signals, particularly for high-frequency applications.
Innovation Solution
A method and circuit for generating a Single-Side Band (SSB) RF test signal using a frequency-divided local oscillator signal, with a voltage-controlled oscillator and frequency divider, and a Phase-Locked Loop (PLL) circuit, to simulate echo signals and improve calibration and fault detection accuracy.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a loop-back BIST architecture with mixer and attenuator is used to generate test signals, then the circuit can provide basic test functionality, but the generated DSB signal is not suitable for calibrating radar sensor IC and image rejection accuracy is insufficient
Solution Approach 1:
The patent extracts and removes the image frequency component from the signal spectrum, keeping only the desired single-sideband signal. This is achieved through selective signal processing that separates the useful signal from the interfering image signal, thereby improving both calibration accuracy and image rejection ratio without requiring complex additional circuitry.
Solution Approach 2:
The patent generates a test signal that is a precise copy of the expected radar echo signal, including its amplitude, phase, and frequency characteristics. By creating an accurate signal replica through the SSB generation circuitry, the system can effectively calibrate the receiver chain and verify performance without needing external test equipment.
2Reliability
If additional integrated circuitry is added for BIST and calibration functionality to meet safety standards, then functional safety and fault detection capability are improved, but device complexity increases
Solution Approach 1:
The patent combines the BIST signal generation, calibration, and monitoring functions into an integrated circuit block that works seamlessly with the existing radar sensor architecture. The SSB generator, frequency dividers, and control logic are merged into a unified structure that shares resources with the main signal path, reducing overall system complexity while maintaining comprehensive safety functionality.
Solution Approach 2:
The patent designs the BIST circuitry to perform multiple functions: generating test signals, calibrating the receiver, monitoring hardware faults, and verifying performance characteristics. This multi-functional approach allows a single integrated block to replace what would otherwise require separate dedicated circuits for each function, thereby improving reliability without proportionally increasing complexity.
3Speed
If high-frequency oscillating signals are generated for radar applications, then the radar sensor can operate at required frequencies, but generating accurate I and Q signals becomes complex and image rejection is not sufficient
Solution Approach 1:
The patent performs frequency division and signal conditioning operations before the main mixing stage to pre-establish the correct I and Q signal relationships. By dividing the high-frequency signal first and then generating the modulated test signal at the lower intermediate frequency, the system avoids the complexity of directly generating and manipulating high-frequency I/Q pairs, thereby simplifying the signal generation architecture while maintaining accuracy.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the accuracy of IC performance monitoring and calibration, enabling better detection of hardware faults and performance stability across temperature and aging variations, aligning with safety standards like ISO 26262.
Implementation Method 1
applying frequency division to a local oscillator signal to produce a frequency-divided signal
Implementation Method 2
a mixer circuit configured to receive as inputs an oscillating signal of the first PLL circuit and an oscillating signal of the second PLL circuit
Implementation Method 3
a second PLL circuit configured to receive an output signal of the delay circuit as a reference signal
Data Source
Figure 1~2
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AI summary
A self-test signal (RFTEST) for e.g. radar sensor ICs (10) wherein a local oscillator signal (TX/LO) is generated (122) for mixing (28) with a reception signal (22) by: - applying frequency division (124) to the local oscillator signal (TX/LO) to produce a frequency-divided signal (FDIV, fREF), - providing a signal generator (320a) for generating the self-test signal (RFTEST) and - generating the self-test signal (RFTEST) by operating said the signal generator (320a) with operation of the signal generator monitored or controlled (320) by means of the frequency-divided signal (fDIV, fREF).