Self-Test Circuit Using Signature Comparison Without Reconfiguration
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Solution Overview
Problem
Existing self-test implementations for complex digital blocks, such as those in electric vehicle power modules, increase power consumption, complexity, and die size, and require extensive reconfiguration, which is inefficient and resource-intensive.
Innovation Solution
An electronic circuit with a configuration register, event processor, signal generator, and signature generator, allowing for a self-test mode that generates a reference signature and compares it with a test signature, reducing the need for additional components and reconfiguration by using a pseudo-random checking signal and a finite state machine to manage test modes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If existing self-test implementations are used for complex digital blocks, then fault detection capability is provided, but power consumption increases and die size increases
Solution Approach 1:
The event processor is designed to perform both normal operational functions and self-test functions using the same hardware resources. During self-test mode, the processor executes test algorithms instead of normal operations, eliminating the need for dedicated test hardware and reducing overall power consumption and die size while maintaining fault detection capability
2Reliability
If existing self-test implementations are used for complex digital blocks, then fault detection capability is provided, but device complexity increases
Solution Approach 1:
The same event processor that handles normal operational events is reused for self-testing purposes. The processor can be configured via registers to operate in either normal mode or self-test mode, eliminating the need for separate dedicated test processors and reducing device complexity while maintaining comprehensive fault detection capability
Solution Approach 2:
The electronic circuit performs self-testing using its own internal resources without requiring external test equipment or additional dedicated test structures. The event processor generates test signals, processes test data, and produces test results autonomously, reducing overall system complexity
3Reliability
If existing self-test implementations are used, then self-testing functionality is provided, but extensive reconfiguration and reprogramming are required
Solution Approach 1:
Test configuration parameters and algorithms are pre-loaded into configuration registers during manufacturing or initial system setup. When self-testing is needed, the pre-configured event processor can immediately execute test routines without requiring time-consuming reconfiguration, reducing reconfiguration time while maintaining flexible self-testing functionality
Solution Approach 2:
The event processor uses configurable registers that allow dynamic switching between normal operational mode and self-test mode without physical reconfiguration. The same hardware structure adapts its function based on register settings, enabling rapid mode transitions and eliminating extensive reconfiguration requirements
Data Source
AI summary
An electronic circuit for performing a self-test, comprising: a first circuit with: a first configuration register configured to define functions which are settable by a user, a first event processor, a first signal generator, and a first signature generator. The electronic circuit also comprises: a second circuit which comprises: a second configuration register configured to define the same functions, a second event processor, a second signal generator, and a second signature generator; and a comparison block. During a reference-defining mode of the electronic circuit: the first signal generator provides a checking signal to the first event processor, the first event processor generates an output signal based on the checking signal and the functions, and the first signature generator generates a reference signature based on this output signal. During a self-testing mode of the electronic circuit: the second signal generator provides the checking signal to the second event processor, the second event processor generates an output signal based on the checking signal and the functions, and the second signature generator generates a test signature based on this output signal. The comparison block compares the test signature to the reference signature to provide a test result signal.