Self-Timed Differential Current Sensing for Low-Current Flash Reads
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Solution Overview
Problem
In high-speed, low-voltage, and small semiconductor device applications, traditional sense amplifiers face difficulties in reliably detecting small current differences between flash memory cells due to increased capacitance and decreased cell current, leading to challenges in quickly and accurately determining memory cell states.
Innovation Solution
A self-timed integrating differential current sense amplifier is introduced, which uses a self-timed integrating circuit to accumulate charge over a variable integration time based on a reference voltage, allowing for better control over integration time and improved detection of memory cell states, and includes a differential sense amplifier with a comparator and current mirrors to compare voltage signals and determine the memory cell state.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If traditional sense amplifiers are used in high-speed, low-voltage applications, then the memory cell size can be reduced and operating speed increased, but the ability to reliably detect small current differences deteriorates due to increased capacitance and decreased cell current
Solution Approach 1:
The patent applies preliminary action by performing charge accumulation on capacitors during a predetermined integration time period before the actual measurement and comparison. This allows the small current differences from memory cells to be integrated over time, building up sufficient charge difference on the capacitors to enable reliable detection even when individual cell currents are very small. The integration process prepares the signal in advance, making it detectable by the subsequent comparator stage.
2Quantity of substance
If memory cell density is increased to reduce cell size, then storage capacity improves, but the current difference between charged and uncharged cells becomes smaller and harder to detect
Solution Approach 1:
The patent uses preliminary action by implementing an integration phase where capacitor charges are accumulated from cell currents over a predetermined time period before measurement. This time-integrated charge accumulation transforms tiny current differences (which become harder to detect as cells shrink) into larger, more measurable voltage differences on the capacitors, enabling reliable detection despite increased cell density and smaller current signals.
Solution Approach 2:
The patent applies dimensionality change by transitioning from direct current measurement to time-integrated charge measurement. Instead of attempting to measure small current differences directly, the system integrates current over time on capacitors, converting the measurement from the current domain to the charge/voltage domain after integration. This dimensional transformation makes small current differences detectable through larger accumulated charge differences.
3Measurement precision
If integration time is extended to improve current detection accuracy, then measurement precision improves, but read time increases and system speed decreases
Solution Approach 1:
The patent applies dynamics by making the integration time adaptive rather than fixed. The integration period is dynamically adjusted based on the reference cell current magnitude - when reference current is high, integration time is shortened; when reference current is low, integration time is extended. This dynamic adjustment allows the system to achieve sufficient measurement precision for each specific operating condition while minimizing the read time penalty, optimizing the trade-off between accuracy and speed for different current levels.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution enables faster and more reliable determination of memory cell states by accurately tracking and comparing voltage signals, reducing read time and improving system performance, even at low input currents and high densities.
Implementation Method 1
an integrating capacitor operable to integrate the memory cell current during a predetermined integration time to produce an integrated voltage signal
Implementation Method 2
a comparator operable to compare a first integrated voltage signal from a first integrating capacitor with a second integrated voltage signal from a second integrating capacitor to determine a state of the memory cell
Data Source
AI summary
A reference current integrator and a sensed current integrator are coupled to form a differential sense amplifier. The differential sense amplifier is coupled to receive a bitline current signal from a flash memory, and the reference current integrator is coupled to receive a current signal from a reference memory cell. Integration continues until a desired voltage or time is reached, resulting in a sufficiently reliable output. The differential current integrating sense amplifier is also used for instrumentation, communication, data storage, sensing, biomedical device, and analog to digital conversion.


