Self-Timed Gate Controller Minimizes DC-DC Converter Dead-Time
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Solution Overview
Problem
Existing DC-DC converters face challenges in minimizing dead-time during power MOS switching, which leads to power loss, and current solutions either require additional pins for pre-calibration or increase packaging costs, or result in increased dead time due to guard band reservations for gate voltage sensing.
Innovation Solution
A self-timed gate controller is introduced, utilizing voltage dividers and comparators to determine the turn-on time of high side switches based on voltage divisions of the output node and inductor switching node, minimizing dead-time and reducing overshoot and undershoot switching losses without additional control pins.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If a sample/hold circuit is used to detect dead time, then dead time can be minimized, but leakage occurs at low switching frequency
Solution Approach 1:
The gate controller uses its own output gate signal as feedback to automatically adjust dead time, eliminating the need for external sample/hold circuits and their associated leakage problems at low switching frequencies
2Loss of energy
If pre-calibration is used to minimize dead time, then dead time can be reduced, but additional pins are required which increases packaging cost
Solution Approach 1:
The system performs self-calibration using internal resources (output gate signal feedback) without requiring external calibration pins or additional packaging complexity
Solution Approach 2:
The gate controller simultaneously performs multiple functions: generating gate signals, detecting switching moments, adjusting dead time, and calibrating the system, all without additional external components
3Loss of energy
If gate voltage sensing is used to control dead time, then dead time can be minimized, but a guard band must be reserved which increases dead time
Solution Approach 1:
The gate controller uses feedback from its own output gate signal to precisely detect switching moments and adjust dead time dynamically, eliminating the need for conservative guard bands while minimizing power loss
Data Source
AI summary
A DC-DC converter and a DC-DC converter operation method are provided. The DC-DC converter includes a power stage, an error amplifier, a pulse width modulation (PWM) generator, and a gate controller. The power stage includes a first transistor and a second transistor. The voltage dividers are configured to perform a voltage division on a first node of the power stage and a second node to generate a first voltage and a second voltage. The first node is an output node of the DC-DC converter and the second node is a node between the first transistor and the second transistor of the DC-DC converter. The comparator is configured to compare the first voltage and the second voltage to generate a turn-on time signal of the first transistor according to a comparison result.