Self-Timed Memory Sensing for Faster Stable NVM Reads
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Solution Overview
Problem
In non-volatile memory systems, the read timing is inefficient due to variations in voltage supplies, operating temperature, and semiconductor process, leading to slower read speeds and increased power consumption, requiring significant calibration trimming during manufacturing.
Innovation Solution
A self-timed sensing architecture that uses XOR logic and a self-timer to determine when a stable sensing value is obtained, allowing the read operation to complete and power savings by shutting off sense amplifiers once data is latched, eliminating the need for calibration trimming and reducing read duration.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a fixed read timer with sufficient margin is used to accommodate variations in voltage, temperature, and process, then read reliability is improved, but read speed deteriorates and power consumption increases
Solution Approach 1:
The patent replaces the fixed, static read timer with a dynamic self-timed sensing mechanism that automatically adjusts the read duration based on actual cell characteristics. The sense amplifier and latch circuitry dynamically determine when sensing is complete, allowing the system to adapt read timing to each specific cell's voltage, temperature, and process conditions, thereby achieving both high reliability and fast read speeds without requiring excessive timing margins.
Solution Approach 2:
The sensing circuitry performs self-timing by automatically detecting when a stable sensing value has been obtained from the selected cell. The sense amplifier monitors its own output and generates an end-of-sensing signal when stability is achieved, eliminating the need for an external fixed timer and enabling the system to self-regulate read duration based on actual sensing conditions.
2Reliability
If a fixed read timer with sufficient margin is used to accommodate variations in voltage, temperature, and process, then read reliability is improved, but power consumption increases
Solution Approach 1:
The dynamic self-timed mechanism allows the sensing circuitry to operate only for the minimum necessary duration to achieve stable sensing, rather than running for a fixed extended period. This dynamic adjustment ensures that power is consumed only when needed, reducing overall power consumption while maintaining reliability across varying voltage, temperature, and process conditions.
Solution Approach 2:
The self-timed sensing circuitry automatically terminates the sensing operation when a stable value is detected, preventing unnecessary continued operation of power-consuming components. This self-termination capability ensures that power consumption is minimized while still achieving reliable sensing results.
3Manufacturing precision
If calibration trimming is performed on a die-by-die basis during manufacturing, then read timing precision is improved, but manufacturing complexity and cost increase
Solution Approach 1:
The patent implements a self-timed sensing architecture that automatically compensates for process variations without requiring external calibration or trimming. The sense amplifier and latch circuitry self-adjust their operation based on actual cell characteristics, eliminating the need for die-by-die calibration trimming during manufacturing. This reduces manufacturing complexity and cost while maintaining timing precision through dynamic adaptation rather than static calibration.
Data Source
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AI summary
A self-timed sensing architecture for reading a selected cell in an array of non-volatile cells is disclosed. The sensing circuitry generates a signal when a stable sensing value has been obtained from the selected cell, where the stable sensing value indicates the value stored in the selected cell. The signal indicates the end of the sensing operation, causing the stable sensing value to be output as the result of the read operation.