Self-Tracked Bistable Latch Cell for PUF Reliability
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Solution Overview
Problem
Bistable latch cells in physical unclonable functions (PUFs) face challenges in maintaining and reproducing their initial state due to manufacturing variations and environmental changes, leading to reliability issues and security vulnerabilities from helper data and error correction overheads.
Innovation Solution
A self-tracked bistable latch cell design incorporating cross-coupled latches and programmable transistors with thinner gate oxides, which track the initial state by rupturing transistors based on complementary bit pairs generated during manufacturing processes, allowing for predictable bit storage and retrieval.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional bistable latch cells are used for PUF implementation, then randomness and unpredictability are achieved, but reliability deteriorates due to state flipping from environmental changes and device aging
Solution Approach 1:
The patent applies preliminary action by establishing the initial state of the latch cell during manufacturing and using this pre-established state as the basis for PUF operation. The latch cell is designed to naturally settle into a stable initial state due to manufacturing variations, and this state is then used for cryptographic operations without requiring additional error correction or helper data during runtime.
Solution Approach 2:
The invention implements self-service by designing the latch cell to inherently maintain and reproduce its initial state through its physical structure and operating principles. The cell uses its own manufacturing variations as the entropy source and automatically preserves this state without requiring external helper data or error correction algorithms, making the system self-sufficient and improving reliability.
2Reliability
If helper data and error correction algorithms are added to improve reproducibility, then reliability improves, but system complexity and security vulnerability increase
Solution Approach 1:
The patent extracts and removes the helper data and error correction mechanisms from the PUF system. By designing the latch cell to inherently maintain its initial state through its physical structure, the invention eliminates the need for these additional components, thereby reducing system complexity and removing potential security vulnerabilities associated with storing and processing helper data.
3Adaptability or versatility
If the latch cell operates without state tracking, then device simplicity is maintained, but unpredictability and security deteriorate due to inability to preserve initial state
Solution Approach 1:
The patent merges the state tracking function directly into the latch cell structure by integrating programmable transistors with the cross-coupled inverter configuration. This combination allows the cell to simultaneously maintain its bistable nature for PUF operation while incorporating tracking capability to preserve and reproduce the initial state, achieving both adaptability and security without significantly increasing overall device complexity.
Data Source
AI summary
A self-tracked bistable latch cell includes a cross-coupled latch, and two programmable transistors. The cross-coupled latch has a first data terminal, a second data terminal, a first voltage input terminal for receiving a latch control signal, and a second voltage input terminal for receiving a reference voltage. The first programmable transistor has a first terminal for outputting a first bit, a second terminal coupled to the first data terminal of the cross-coupled latch, and a control terminal for receiving a track control signal. The second programmable transistor has a first terminal for outputting a second bit, a second terminal coupled to the second data terminal of the cross-coupled latch, and a control terminal for receiving the track control signal. The gate oxide of both the first and the second programmable transistor are thinner than the gate oxide of the transistor of the cross-coupled latch.