SEM Overlay Measurement for Semiconductor Alignment
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Solution Overview
Problem
Current overlay measurement techniques in semiconductor manufacturing face challenges in achieving precise alignment between layers due to tool-induced and wafer-induced shifts, which affect the accuracy and yield of integrated circuit production.
Innovation Solution
A system and method utilizing a scanning electron microscope (SEM) to measure overlay shifts between masks, comparing the measurements to database information for error correction and feed-forward control in the fabrication process, thereby improving the accuracy of the photolithography process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If optical overlay measurement tools are used, then measurement can be performed, but tool-induced shift and wafer-induced shift reduce measurement precision
Solution Approach 1:
The patent replaces optical measurement systems with a scanning electron microscope (SEM) based measurement system. The SEM uses electron beams instead of optical lenses to image overlay marks, eliminating optical asymmetry issues. The electron beam is scanned across the wafer surface to detect overlay mark positions with high precision, substituting the optical field with an electron field to avoid TIS problems.
Solution Approach 2:
The patent introduces special overlay marks with asymmetric designs as intermediaries for measurement. These marks are specifically designed to be sensitive to overlay shifts while being imaged by the SEM. The asymmetric geometry of these marks allows the measurement system to detect both tool-induced and wafer-induced shifts by comparing the imaged mark positions against design data.
2Manufacturing precision
If conventional photolithography overlay methods are used, then manufacturing process can proceed, but alignment precision between layers deteriorates due to TIS and WIS
Solution Approach 1:
The patent performs overlay measurements at multiple stages during the fabrication process using SEM. By measuring overlay marks after each lithography and etching step, the system detects alignment errors early and provides feedback for correction before subsequent processing steps. This preliminary detection prevents compounding of alignment errors through multiple process steps.
Solution Approach 2:
The patent implements a feedback loop where SEM overlay measurements are compared against target overlay specifications, and correction data is fed back to adjust subsequent lithography alignment. The system uses the measured overlay mark positions to calculate alignment offsets and communicates these corrections to the photolithography tool for real-time or near-real-time compensation, improving layer-to-layer alignment precision.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Significantly enhances the accuracy of the fabrication process by correcting tool-induced and wafer-induced shifts, ensuring precise alignment and reducing the risk of defects such as contact-to-gate shorts during integrated circuit manufacturing.
Implementation Method 1
utilizing a scanning electron microscope (SEM) to measure the overlay shift
Data Source
AI summary
A method and system for controlling an overlay shift on an integrated circuit is disclosed. The method and system comprises utilizing a scanning electron microscope (SEM) to measure the overlay shift between a first mask and a second mask of the circuit after a second mask and comparing the overlay shift to information about the integrated circuit in a database. The method and system includes providing a control mechanism to analyze the overlay shift and feed forward to the fabrication process before a third mask for error correction. A system and method in accordance with the present invention advantageously utilizes a scanning electron microscope (SEM) image overlay measurement after the fabrication process such as etching and chemical mechanical polishing (CMP).