Semaphore Management on Coherent Bus via Read Prefer Exclusive
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Solution Overview
Problem
In multi-processor systems with coherent buses, semaphore management can lead to live-lock or poor performance due to competing processors trying to access shared data, as existing cache coherence protocols do not efficiently handle the states of reservation granules.
Innovation Solution
Implementing read prefer exclusive and upgrade prefer exclusive commands on the coherent bus to manage cache line states and reservation granules, allowing processors to acquire cache lines in exclusive or shared states without unnecessary bus requests, thereby avoiding live-lock situations and improving performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional cache coherence protocols are used for semaphore management, then cache line validity is maintained, but processors experience live-lock or poor performance due to unnecessary bus requests
Solution Approach 1:
The patent applies preliminary action by introducing new bus commands (read-prefer-exclusive, upgrade-prefer-exclusive) that allow processors to proactively establish exclusive access rights before actual data access. This prevents the need for repeated bus requests and live-lock situations, as processors can preemptively secure cache lines in exclusive state when no other processor currently holds them.
Solution Approach 2:
The patent changes the state parameters of cache lines by introducing additional states (exclusive, shared, invalid) and corresponding transition mechanisms through new bus commands. This allows the system to dynamically adjust cache line states based on semaphore acquisition needs, improving performance by reducing unnecessary bus traffic while maintaining reliability through proper state management.
2Stability of the object's composition
If processors compete for shared data using traditional protocols, then data coherence is maintained, but latency increases due to multiple bus requests
Solution Approach 1:
The patent reduces latency by allowing processors to perform preliminary actions through read-prefer-exclusive and upgrade-prefer-exclusive commands. These commands enable processors to acquire cache lines in exclusive state without waiting for other processors to release them, thereby reducing the time spent in semaphore acquisition sequences while maintaining data coherence through proper cache state transitions.
Solution Approach 2:
The patent applies the skipping principle by enabling processors to rush through the semaphore acquisition process when the cache line is not currently held by another processor. The new bus commands allow direct transition to exclusive state without unnecessary intermediate steps, effectively skipping over the latency-inducing bus requests that would otherwise be required under traditional protocols.
3Loss of information
If existing semaphore management instructions are used, then reservation granule states are tracked, but performance degrades due to unnecessary bus traffic
Solution Approach 1:
The patent extracts the problematic element of unnecessary bus traffic by introducing new commands that eliminate redundant coherence protocol interactions. The read-prefer-exclusive and upgrade-prefer-exclusive commands allow processors to manage reservation granule states locally without generating excessive bus traffic, thereby improving processor throughput while maintaining proper state tracking information.
Solution Approach 2:
The patent changes the operational parameters of semaphore management by introducing new bus command types that modify how reservation granule states are tracked and transitioned. This reduces the frequency and volume of bus traffic required to maintain state information, improving overall system productivity while preserving the integrity of reservation granule state tracking through the new command semantics.
Data Source
AI summary
Techniques are described for a multi-processor having two or more processors that increases the opportunity for a load-exclusive command to take a cache line in an Exclusive state, which results in increased performance when a store-exclusive is executed. A new bus operation read prefer exclusive is used as a hint to other caches that a requesting master is likely to store to the cache line, and, if possible, the other cache should give the line up. In most cases, this will result in the other master giving the line up and the requesting master taking the line Exclusive. In most cases, two or more processors are not performing a semaphore management sequence to the same address at the same time. Thus, a requesting master's load-exclusive is able to take a cache line in the Exclusive state an increased number of times.