Semaphore for Multi-Core Processor Bus Contention
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Solution Overview
Problem
In multi-core processors, high bus usage is wasted due to repeated polling operations by cores competing for shared resources, leading to inefficient bus capacity utilization and potential race conditions.
Innovation Solution
A hardware semaphore system with separate access-request queues and a selectable scheduling algorithm that uses dedicated core lines for interrupt signals, eliminating the need for repeated polling and preventing race conditions by granting access to shared resources based on a scheduling algorithm.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If cores repeatedly poll the semaphore to access shared resources, then cores can detect resource availability, but bus capacity is wasted due to high polling operations
Solution Approach 1:
The patent introduces dedicated core lines as intermediary communication channels between the semaphore and cores. Instead of using the system bus for polling, the semaphore sends interrupt signals through these dedicated lines, eliminating the need for repeated bus polling while maintaining reliable resource access control.
Solution Approach 2:
The patent replaces the mechanical polling mechanism (repeated bus transactions) with an event-driven interrupt mechanism. The semaphore actively notifies waiting cores via interrupt signals on dedicated lines, substituting the passive polling approach with a more efficient notification system that eliminates unnecessary bus traffic.
2Ease of operation
If cores poll the semaphore continuously when resource is occupied, then cores can wait for resource availability, but system performance deteriorates due to repeated polling operations
Solution Approach 1:
Dedicated core lines serve as intermediaries that allow the semaphore to communicate resource status to waiting cores without requiring continuous bus transactions. The interrupt mechanism on these dedicated lines provides an efficient waiting mechanism that maintains system responsiveness and performance.
Solution Approach 2:
The patent replaces continuous periodic polling with event-triggered interrupt actions. Instead of cores repeatedly querying the semaphore at fixed intervals, the semaphore sends interrupts only when resource status changes, eliminating wasteful periodic bus transactions while maintaining effective resource waiting.
3Adaptability or versatility
If the number of cores is large, then parallel processing capability increases, but bus capacity is overwhelmed by polling operations from multiple cores
Solution Approach 1:
The patent segments the communication path by introducing dedicated core lines for each core, separating the interrupt signaling function from the system bus. This segmentation allows multiple cores to receive semaphore notifications simultaneously through their own dedicated lines without contending for bus capacity, enabling scalable parallel processing.
Solution Approach 2:
The patent adds a new communication dimension by introducing dedicated core lines as a separate signaling path parallel to the system bus. This dimensional addition allows interrupt signals to reach multiple cores simultaneously without occupying bus bandwidth, resolving the conflict between parallel processing capability and bus capacity utilization.
Data Source
AI summary
A multi-core processor manages contention amongst its cores for access to a shared resource using a semaphore that maintains separate access-request queues for different cores and uses a selectable scheduling algorithm to grant pending requests, one at a time. The semaphore signals the core whose request is granted by sending it an interrupt signal using a dedicated core line that is not part of the system bus. The granted request is then de-queued, and the core accesses the shared resource in response to receiving the interrupt signal. The use of dedicated core lines for transmitting interrupt signals from the semaphore to the cores alleviates the need for repeated polling of the semaphore on the system bus. The use of the scheduling algorithm prevents a potential race condition between contending cores.