Semi-Circle Drain-Side Select Gate Refresh for SGD Downshift
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Solution Overview
Problem
Semi-circle drain side select gate (SC-SGD) memory technology faces issues due to exposure of poly-channel to neighbor SGD electrical fields, leading to SGD downshift and increased failure bit count, which is not effectively addressed by existing technologies.
Innovation Solution
Implementing drain-side select gate transistors with controlled transistor threshold voltage management, including semi-circle and full-circle rows, to detect and recover from downshift events, ensuring accurate programming and reduced failure rates.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If etching technology is used to cut memory holes into semi-circular shape to reduce die size, then area utilization is improved, but the poly-channel is exposed to neighboring electric fields causing SGD downshift and increased failure bit count
Solution Approach 1:
The patent applies preliminary action by performing threshold voltage refresh on drain-side select gate transistors before they experience significant downshift. The control means monitors memory operations and proactively repromotes select gate transistors to maintain their threshold voltage, preventing the harmful neighboring electric field effects from accumulating to failure levels.
Solution Approach 2:
The patent changes the parameter of transistor threshold voltage dynamically. The control means detects when select gate transistors have been promoted (threshold voltage shifted) due to neighboring electric fields and applies corrective programming to restore the threshold voltage to its original value, effectively counteracting the parameter change caused by the semi-circular etching structure.
2Ease of manufacture
If drain-side select gate transistors are used in semi-circle rows exposed to neighboring electric fields, then manufacturing complexity is reduced, but transistor threshold voltage stability deteriorates
Solution Approach 1:
The patent implements feedback by having the control means continuously monitor memory operations and detect when downshift recovery trigger events occur. Based on this feedback, the system automatically initiates threshold voltage refresh operations on affected select gate transistors, creating a closed-loop control system that maintains threshold voltage stability despite the simplified semi-circular manufacturing structure.
3Productivity
If semi-circle rows with slit half etch are used to increase memory density, then productivity is improved, but neighbor select gate interference increases causing SGD downshift
Solution Approach 1:
The patent converts the harmful neighboring electric field interference into a manageable parameter. Instead of trying to eliminate the interference physically, the system uses the interference-induced threshold voltage shift as a detectable signal and compensates for it through controlled repromotion operations, effectively converting the harmful effect into information that guides corrective action.
Data Source
AI summary
A memory apparatus and method of operation are provided. The apparatus includes drain-side select gate transistors for coupling to a drain-side of memory holes of and configured to retain a transistor threshold voltage. The memory holes are arranged in rows comprising strings. The rows include semi-circle rows comprising the memory holes being partially cut by a slit half etch and full circle rows comprising the memory holes not cut. A control means is coupled to the drain-side select gate transistors of the memory holes and is configured to determine whether a downshift recovery trigger event has occurred in a plurality of memory operations. In response to determining the downshift recovery trigger event has occurred, the control means programs the transistor threshold voltage of the drain-side select gate transistors of the memory holes in at least one of the semi-circle rows to a target transistor threshold voltage.