Semi-Dual Reference Voltage Data Receiver for Noise Tolerance
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Solution Overview
Problem
Semiconductor devices face challenges in transmitting data efficiently through single transmission lines due to susceptibility to common mode noise and increased complexity in dual reference voltage systems, which affect system manufacturing costs and performance.
Innovation Solution
A data receiving apparatus using a single reference voltage with a first input buffer, a second input buffer, and a phase detector, where the buffers are designed with specific transistors and current offset controlling units to amplify voltage differences and detect phase differences, allowing for differential signaling through a single transmission line.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If single-ended signaling is used to reduce the number of pins, then the required number of pins is reduced, but the susceptibility to common mode noise increases and the input data eye is halved
Solution Approach 1:
The invention segments the reference voltage function into two separate reference voltages (VREFH and VREFL) that are applied to different input buffers. This segmentation allows differential comparison of the single data signal against two reference levels, effectively creating a differential signaling effect while still using a single transmission line, thus improving noise tolerance without increasing pin count
Solution Approach 2:
The invention introduces an intermediary phase detector that compares the outputs of two input buffers receiving the same data signal but different reference voltages. This phase detector acts as a mediator that converts the voltage difference caused by common mode noise into a detectable phase difference, allowing the system to reject common mode noise while maintaining single-ended signaling
2Reliability
If dual reference voltage is used to achieve differential signaling through single transmission line, then noise tolerance is improved, but circuit complexity increases
Solution Approach 1:
The invention applies local quality by giving each input buffer different reference voltages (VREFH for the first buffer, VREFL for the second buffer) while keeping the overall system architecture simple. This local differentiation allows each buffer to optimize its operation for specific voltage ranges, improving noise tolerance without requiring complex circuitry across the entire system
Solution Approach 2:
The invention changes the reference voltage parameter from a single value to two distinct values (VREFH and VREFL) that bracket the data signal voltage range. This parameter change enables the system to detect both high and low logic levels more reliably in the presence of noise, achieving differential signaling performance through a simple parameter modification rather than complex circuit design
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution reduces circuit complexity, enhances noise tolerance, and maintains performance comparable to dual reference voltage systems, thereby minimizing manufacturing costs and improving system reliability.
Implementation Method 1
a first input buffer that senses and amplifies a voltage difference between a data signal and a reference voltage to generate a first output signal
Implementation Method 2
a second input buffer that senses and amplifies a voltage difference between the reference voltage and the data signal to generate a second output signal
Implementation Method 3
a phase detector that detects a phase difference between a first output signal and a second output signal, and determines received data according to the detected phase difference
Data Source
AI summary
A semi-dual reference voltage data receiving apparatus includes a first input buffer, a second input buffer, and a phase detector wherein the first input buffer includes a first input receiving unit, a first sense amplifier, and a first current offset controlling unit. The first sense amplifier senses and amplifies the voltage difference between the voltage of a first terminal of a first input transistor and the voltage of a first terminal of a second input transistor. The first current offset controlling unit controls the offset of the current that flows through the second terminal of the second input transistor.