Semi-sequential Galois Field Multiplier Hardware Cost Reduction
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The high hardware cost of Galois Field GF(2n) multipliers, particularly in GCM-AES implementations, due to expensive computation complexity, necessitates a reduction in hardware requirements while maintaining Gigabit processing power for network communication environments.
Innovation Solution
A semi-sequential Galois Field multiplier architecture utilizing two single ground field GF(2m) multipliers, a constant multiplier, and GF(2m) adders, where high-order and low-order elements of operands are inputted in parallel and sequentially to generate partial products, which are then mapped back to GF(2n) to perform efficient multiplication.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a single GF(2m) multiplier architecture is used for sequential input, then device complexity is reduced, but processing speed decreases
Solution Approach 1:
The patent segments the GF(2n) multiplication into multiple GF(2m) multiplication stages by using composite field representation. The single GF(2m) multiplier is reused across different stages (first stage, second stage, third stage) to perform partial products computations, thereby reducing overall device complexity while maintaining processing throughput through pipelined sequential operation
Solution Approach 2:
The patent employs periodic action by reusing the same GF(2m) multiplier architecture across multiple computation stages with different input operands. The multiplier is systematically reused in a periodic manner: first for computing a1*b1 and a1*b0, then for computing a0*b1 and a0*b0, achieving resource efficiency without sacrificing complete functionality
2Measurement precision
If GF(2n) multiplication is performed directly, then computation accuracy is maintained, but hardware cost increases
Solution Approach 1:
The patent changes the parameter representation by transforming the GF(2n) field elements into composite field GF((2m)k) representation. This parameter transformation allows the use of smaller GF(2m) multipliers instead of a large GF(2n) multiplier, reducing hardware cost while preserving computational accuracy through mathematically equivalent operations
Solution Approach 2:
The patent introduces composite field representation as an intermediary layer between the input GF(2n) elements and the GF(2m) multiplier operations. This intermediary transformation enables the use of simpler, lower-cost multiplier hardware while maintaining the mathematical correctness of the original GF(2n) multiplication through field isomorphism
Data Source
AI summary
Disclosed are a semi-sequential Galois field GF(2n) multiplier and the method thereof. The GF(2n) multiplier comprises two ground field multipliers over GF(2m), at least a constant multiplier, and multiple GF(2m) adders. The high-order and low-order elements from a composite field GF((2m)2) for one operand of one GF(2n) multiplication are inputted in parallel into the two ground GF(2m) multipliers, respectively. The high-order and low-order elements from the composite field of another operand of the GF(2n) multiplication are sequentially inputted into the two ground GF(2m) multipliers. As such, multiple partial products are generated. The constant multiplication and additions are performed on the multiple partial products through the constant multiplier and the GF(2m) adders. This generates a high-order element and a low-order element of the composite field GF((2m)2). After mapping these two elements of GF((2m)2) back to GF(2n), the GF(2n) multiplication is done.