Semiconducting Via PUF for Reliable Device Authentication
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Solution Overview
Problem
Existing physical unclonable functions for device authentication and key generation in integrated circuits face challenges with variability, leading to bit errors due to slight changes in temperature or time, which reduces security and reliability.
Innovation Solution
Incorporating semiconducting material in the backend of integrated circuits, specifically in vias, to create structures with increased variability through processes like laser anneal and patterning, which enhances the reliability and uniqueness of physical unclonable functions, reducing the likelihood of bit errors over time and temperature changes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If physical unclonable functions are implemented in integrated circuits, then device authentication capability is provided, but variability in physical properties causes bit errors under temperature or time changes
Solution Approach 1:
The patent changes the physical parameters of the PUF structures by introducing semiconducting material into backend vias and applying laser annealing. This modifies the electrical resistance and other physical properties of the PUF elements, creating more stable and distinguishable characteristics that are less susceptible to environmental variations, thereby resolving the contradiction between authentication reliability and physical property stability.
Solution Approach 2:
The patent combines semiconducting material with the existing backend via structure to create a composite PUF element. This composite structure leverages the unique properties of both the semiconducting material and the via structure, producing physical unclonable functions with enhanced stability and reduced bit errors under temperature and time variations.
2Reliability
If semiconducting material is deposited in backend vias, then variability and uniqueness of PUF values are increased, but manufacturing complexity increases
Solution Approach 1:
The patent performs the semiconducting material deposition and laser annealing processes during the backend fabrication stage, before final device assembly. By incorporating the PUF structure creation into the existing manufacturing flow at an early stage, the patent avoids adding significant complexity to the overall production process while still achieving enhanced PUF uniqueness and reliability.
Solution Approach 2:
The laser annealing process automatically creates the desired variability in PUF properties through controlled material transformation. The process self-regulates to produce unique physical characteristics in each via, reducing the need for additional manufacturing steps or complex control mechanisms, thereby balancing PUF uniqueness with manufacturing simplicity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The increased variability in physical properties of semiconducting materials in the backend of integrated circuits results in more reliable and secure binary keys, providing a wide range of unique PUF values that are less susceptible to bit errors, thus enhancing the security and stability of device authentication.
Implementation Method 1
processes like laser anneal and patterning
Implementation Method 2
the measurement circuit is configured to measure a resistance response of the added semiconducting material
Data Source
AI summary
The present disclosure relates to a secure device having a physical unclonable function. The device includes an integrated circuit having a semiconducting material in at least one via in a backend of the integrated circuit. The present disclosure also relates to a method for manufacturing a secure device having a physical unclonable function. The method includes providing an integrated circuit and adding a semiconducting material to at least one via in a backend of the integrated circuit. In some instances a property of the semiconducting material in the at least one via is measured to derive a signature.