Semiconductor Device With Absorption Layer For Thermal Stress

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Solution Overview

Problem

Semiconductor packages face challenges in mechanical strength and reliability due to thermal expansion coefficient differences between semiconductor chips and mounting substrates, leading to potential defects in connection terminals.

Innovation Solution

A semiconductor device design incorporating a first reinforcement layer with a thermal expansion coefficient matching the mounting substrate, interposed with a first absorption layer to absorb stress, and a connection terminal electrically connected to the semiconductor chip, enhancing mechanical strength and reliability.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Strength

If a reinforcement layer with different thermal expansion coefficient is directly disposed on the semiconductor chip, then mechanical strength is improved, but stress concentration occurs due to thermal expansion coefficient difference

Engineering Contradiction:
Improvemechanical strengthVSAvoidconnection terminal reliability
Core Design Contradiction:
StrengthVSReliability

Solution Approach 1:

An absorption layer is introduced as an intermediary between the semiconductor chip and the reinforcement layer. This absorption layer has a thermal expansion coefficient that matches or closely matches the semiconductor chip, thereby reducing stress concentration at the interface while still allowing the reinforcement layer to provide mechanical strength support.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The thermal expansion coefficient parameter is strategically matched across layers. The absorption layer's thermal expansion coefficient is selected to match the semiconductor chip, creating a gradient transition that reduces stress. This parameter matching approach prevents stress concentration while maintaining the structural benefits of the reinforcement layer.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If the absorption layer thickness is increased to better absorb stress, then reliability improves, but device complexity and manufacturing difficulty increase

Engineering Contradiction:
Improvebonding reliabilityVSAvoidlayer structure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The thickness of the absorption layer is optimized to a specific range (1-10 μm) that provides sufficient stress absorption capability while avoiding excessive thickness that would complicate manufacturing. This parameter optimization balances reliability improvement with manufacturing feasibility.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution effectively suppresses defects caused by thermal expansion coefficient differences, improving the mechanical and thermal life cycle of connection terminals and ensuring reliable bonding, comparable to plastic packages.

Implementation Method 1

A first absorption layer may be interposed between the top surface of the semiconductor chip and the first reinforcement layer to absorb a stress resulting from a difference in thermal expansion coefficient between the first reinforcement layer and the semiconductor chip

Methodology Applied
Scientific EffectThermal expansion coefficient difference: Thermal Expansion

Data Source

PatentUS8207606B2Semiconductor device
Publication Date: 2012.06.26 SAMSUNG ELECTRONICS CO LTD
  • US8207606B2 patent drawing
  • US8207606B2 patent drawing
  • US8207606B2 patent drawing

AI summary

A semiconductor device includes a semiconductor chip having a top surface on which a first conductive pad is disposed, a bottom surface opposite to the top surface, and a side surface connecting the top and bottom surfaces to each other, a first reinforcement layer on the top surface of the semiconductor chip, a first absorption layer between the top surface of the semiconductor chip and the first reinforcement layer to absorb a stress resulting from a difference in thermal expansion coefficient between the first reinforcement layer and the semiconductor chip, and a connection terminal disposed on the first reinforcement layer and electrically connected to the first conductive pad.