Semiconductor Package Anisotropic Conductive Film Warpage Control
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Solution Overview
Problem
The semiconductor industry faces challenges in achieving high integration density and reliability in semiconductor packaging due to warpage issues and increased costs associated with core substrates, particularly in Package-on-Package (PoP) technology, where the coefficient of thermal expansion (CTE) mismatch affects the stability and yield of integrated substrates.
Innovation Solution
The use of an anisotropic conductive film to attach discrete core substrates to a redistribution structure, combined with over molding and BGA ball mounting, provides electrical and mechanical connections, mitigating warpage issues and enhancing board-level reliability while reducing core substrate costs through improved thermal expansion matching and integration of multiple smaller substrates.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If core substrates are used in Package-on-Package technology, then integration density and functionality are enhanced, but warpage issues and manufacturing costs increase due to coefficient of thermal expansion mismatch
Solution Approach 1:
The patent introduces a redistribution structure as an intermediary component between the integrated circuit package and core substrates. This redistribution structure serves as a mediator that decouples the thermal expansion mismatch problem, allowing the core substrates to be integrated without directly experiencing the CTE mismatch stresses that would cause warpage. The redistribution structure absorbs the thermal stress differential while maintaining electrical and mechanical connections.
Solution Approach 2:
The patent segments the packaging system into distinct functional layers: an integrated circuit package layer, a redistribution structure layer, and core substrate layers. This segmentation allows each component to be optimized independently for its specific function while reducing the overall warpage impact by distributing thermal stresses across multiple independent layers rather than having a monolithic structure subject to uniform thermal expansion constraints.
2Adaptability or versatility
If core substrates are used in Package-on-Package technology, then integration density and functionality are enhanced, but manufacturing costs increase
Solution Approach 1:
The redistribution structure acts as a cost-effective intermediary that enables the use of smaller, less expensive core substrates while achieving the same functional integration density. By mediating the connection between the integrated circuit package and core substrates, the redistribution structure allows for optimized substrate sizing and material selection, reducing overall manufacturing costs while maintaining high integration density.
Solution Approach 2:
The patent transitions from planar integration to three-dimensional Package-on-Package architecture with vertical stacking. This dimensional change allows multiple core substrates to be integrated in the vertical dimension rather than requiring a single large planar substrate, enabling the use of smaller, cheaper substrates that can be stacked to achieve the required integration density and functionality.
3Quantity of substance
If multiple core substrates are integrated using conventional methods, then component density increases, but yield decreases due to warpage and reliability issues
Solution Approach 1:
The redistribution structure serves as a protective intermediary layer that isolates the core substrates from each other and from the integrated circuit package, preventing warpage propagation across the entire assembly. This mediation enables higher component density through multi-substrate integration while maintaining manufacturing yield by preventing the cumulative warpage effects that would otherwise cause assembly failures and reduce yield.
Solution Approach 2:
The redistribution structure provides beforehand cushioning against thermal expansion stresses before they can propagate through the entire Package-on-Package assembly. By placing this stress-absorbing intermediary layer between components during the manufacturing process, the design preemptively cushions against the warpage and reliability issues that would reduce manufacturing yield, allowing high-density integration to proceed with improved yield rates.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach improves the cost and throughput of semiconductor packaging by enhancing board-level reliability, reducing core substrate costs, and providing greater control over package warpage, leading to higher yield and more stable integration of multiple core substrates within the semiconductor device.
Implementation Method 1
An anisotropic conductive film is formed on a bottom of two or more discrete core substrates. The two or more core substrates are attached, via the anisotropic conductive film, to a redistribution structure build up
Implementation Method 2
mitigating warpage issues and enhancing board-level reliability while reducing core substrate costs through improved thermal expansion matching
Data Source
AI summary
In an embodiment, a method for manufacturing a semiconductor device includes forming a redistribution structure on a carrier substrate, connecting a plurality of core substrates physically and electrically to the redistribution structure with a first anisotropic conductive film, the first anisotropic conductive film including a dielectric material and conductive particles, and pressing the plurality of core substrates and the redistribution structure together to form conductive paths between the plurality of core substrates and the redistribution structure with the conductive particles in the first anisotropic conductive film. The method also includes encapsulating the plurality of core substrates with an encapsulant. The method also includes and attaching an integrated circuit package to the redistribution structure, the redistribution structure being between the integrated circuit package and the plurality of core substrates, the integrated circuit package laterally overlapping a first core substrate and a second core substrate of the plurality of core substrates.