Semiconductor System Active Command Period Adjustment
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Solution Overview
Problem
As semiconductor devices become more integrated, the shrinking distance between word lines leads to increased interference, causing data loss due to changes in the charge stored in cell capacitors, which existing technologies struggle to prevent effectively.
Innovation Solution
A semiconductor system that includes an operation period adjusting circuit to detect and adjust the input count of active commands during a test mode period, thereby reducing interference between adjacent word lines by adjusting the operation period and refresh period accordingly.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If the distance between word lines is shrunk to increase integration, then the degree of integration is improved, but interference between adjacent word lines increases causing data loss
Solution Approach 1:
The patent implements dynamic adjustment of the refresh period based on the input count of active commands. When the input count exceeds a threshold, the refresh period is extended to reduce interference between adjacent word lines. This dynamic parameter adjustment allows the system to adapt to varying access patterns and prevent data loss due to read disturb effects, thereby maintaining data retention reliability while achieving high integration.
Solution Approach 2:
The patent changes the temporal parameter (refresh period) in response to the input count of active commands. By extending the refresh period when necessary, the system reduces the frequency of refresh operations on adjacent word lines, thereby minimizing interference effects. This parameter change strategy enables the system to maintain reliable data storage despite the reduced physical distance between word lines.
2Productivity
If the input count of active command is increased to improve productivity, then the output is improved, but interference between adjacent word lines increases causing data loss
Solution Approach 1:
The patent employs a feedback mechanism where the refresh control circuit monitors the input count of active commands and adjusts the refresh period accordingly. When the input count exceeds a predetermined threshold, the system extends the refresh period to mitigate interference effects. This closed-loop control ensures that productivity can be maximized while maintaining data retention reliability through adaptive refresh timing.
Solution Approach 2:
The system dynamically adjusts the refresh period based on real-time monitoring of active command input counts. This dynamic adaptation allows the system to handle high productivity demands while preventing data loss by extending refresh intervals when interference becomes problematic, thus resolving the contradiction between productivity and reliability.
3Reliability
If the refresh operation is performed frequently to prevent data loss, then the data retention is improved, but the interference effect between adjacent word lines increases
Solution Approach 1:
The patent adjusts the refresh period parameter dynamically based on the input count of active commands. Instead of performing refresh operations at a fixed high frequency, the system extends the refresh period when the input count exceeds a threshold, thereby reducing the frequency of refresh operations and minimizing interference effects on adjacent word lines while still maintaining adequate data retention.
Solution Approach 2:
The refresh operation frequency is made dynamic rather than static. The system adapts the refresh period based on actual access patterns, performing frequent refreshes only when necessary to prevent data loss, and reducing refresh frequency when interference becomes problematic. This dynamic approach balances data retention requirements with interference reduction.
Data Source
AI summary
A semiconductor system including: an operation period adjusting circuit configured to generate operation information for adjusting an operation period, when an input count of an active command during a test mode period is equal to or more than a preset count; and a command generation circuit configured to adjust the input count of the active command applied to a semiconductor device during a preset period, by adjusting the operation period on the basis of the operation information.


