Semiconductor Arrangement With Active Drift Zone Segmentation
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Solution Overview
Problem
Existing power semiconductor devices face challenges in achieving high voltage blocking capability with low on-resistance and low output capacitance, leading to time delays when switching between on-state and off-state.
Innovation Solution
A semiconductor arrangement comprising a first semiconductor device connected in series with multiple second semiconductor devices, where each second semiconductor device has unique device characteristics, such as varying gate resistance or capacitance, to optimize voltage blocking capability and switching speed.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of stationary object
If the length of the drift region is reduced or the doping concentration in the drift region is increased, then the on-resistance decreases, but the voltage blocking capability is reduced
Solution Approach 1:
The invention divides the drift region into multiple zones with different doping concentrations (first drift zone with lower doping and second drift zone with higher doping). This segmentation allows each zone to contribute differently to the overall performance, enabling reduced on-resistance while maintaining voltage blocking capability through the combined effect of the zones.
Solution Approach 2:
The invention applies different doping concentrations to different regions of the drift zone. The first drift zone has a first doping concentration while the second drift zone has a second doping concentration that is higher. This local quality variation optimizes the electrical characteristics in different parts of the device, achieving low on-resistance in the highly doped region while the overall structure maintains voltage blocking capability.
2Reliability
If compensation regions or field plates are provided in the drift region, then the voltage blocking capability is maintained with higher doping, but the device complexity increases
Solution Approach 1:
The invention merges the functions of voltage blocking and current conduction into a single drift region structure with varying doping concentrations. Instead of adding separate compensation regions or field plates, the doping profile itself is optimized to achieve both high voltage blocking capability and low on-resistance simultaneously, simplifying the overall device structure.
3Reliability
If the base region length is increased to increase voltage blocking capability, then the charge carrier plasma storage increases, but the switching speed decreases due to higher output capacitance
Solution Approach 1:
The invention segments the base region into multiple zones with different doping concentrations, creating a gradient structure. This segmentation reduces the charge carrier plasma storage in each individual zone while maintaining the overall voltage blocking capability through the combined effect of all zones, thereby reducing output capacitance and improving switching speed.
Solution Approach 2:
The invention changes the doping concentration parameter along the base region, creating a gradient from lower to higher doping concentrations. This parameter variation optimizes the balance between voltage blocking capability and charge carrier storage, reducing the plasma effect and output capacitance while maintaining adequate voltage blocking performance.
Data Source
AI summary
A semiconductor device arrangement includes a first semiconductor device having a load path and a plurality of second semiconductor devices, each having a load path between a first and a second load terminal and a control terminal. The second semiconductor devices have their load paths connected in series and connected in series to the load path of the first semiconductor device. Each of the second semiconductor devices has its control terminal connected to the load terminal of one of the other second semiconductor devices, and one of the second semiconductor devices has its control terminal connected to one of the load terminals of the first semiconductor device. Each of the second semiconductor devices has at least one device characteristic. At least one device characteristic of at least one of the second semiconductor devices is different from the corresponding device characteristic of others of the second semiconductor devices.