Semiconductor Active Fin Fabrication via Dopant Control
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Solution Overview
Problem
As semiconductor devices become highly integrated, the scale down of MOSFETs leads to deteriorating operating characteristics, and existing technologies have limitations in achieving superior performance and high integration density.
Innovation Solution
A method involving implanting dopants into a substrate to form impurity regions, followed by thermal treatment and epitaxial growth to create active fins with specific isolation layers and gate structures, which enhances the formation of channel regions with controlled dopant concentrations for improved transistor performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If MOSFETs are scaled down to achieve high integration density, then integration density is improved, but operating characteristics deteriorate
Solution Approach 1:
The patent applies local quality by forming different epitaxial layers with distinct materials and dopant concentrations in specific regions. The first epitaxial layer has a first dopant concentration while the second epitaxial layer has a second dopant concentration, creating locally optimized regions that maintain device performance despite overall scaling. This allows different parts of the device to have tailored electrical characteristics suitable for their specific functions.
Solution Approach 2:
The patent utilizes parameter changes by varying dopant concentrations, epitaxial layer thicknesses, and material compositions across different regions of the device. The dopant concentration is changed from the first concentration in the first epitaxial layer to the second concentration in the second epitaxial layer, enabling optimization of electrical characteristics while maintaining scaled dimensions for high integration density.
2Manufacturing precision
If dopants are implanted and thermal treatment is performed to form impurity regions, then dopant distribution is controlled, but crystal defects are generated
Solution Approach 1:
The patent applies preliminary action by forming the first epitaxial layer with controlled dopant concentration before subsequent processing steps. This pre-formed layer with optimized dopant distribution serves as a foundation that reduces the need for aggressive thermal treatment later, thereby minimizing crystal defect generation while maintaining precise dopant control.
Solution Approach 2:
The first epitaxial layer acts as an intermediary between the substrate and the second epitaxial layer. It provides a buffer zone that facilitates controlled dopant distribution while reducing stress and defect propagation from the substrate to the upper layers, thus maintaining crystal quality during thermal processing.
3Reliability
If epitaxial layers with different materials are formed to improve performance, then electrical characteristics are enhanced, but manufacturing complexity increases
Solution Approach 1:
The patent applies segmentation by dividing the device into distinct epitaxial layers with different materials and dopant concentrations. The first epitaxial layer and second epitaxial layer are formed separately with specific characteristics, allowing independent optimization of each layer's electrical properties while maintaining overall device performance.
Solution Approach 2:
The epitaxial growth process serves multiple functions simultaneously: it forms the structural layers, controls dopant distribution, manages stress between layers, and defines electrical characteristics. This multi-functionality reduces the need for additional separate processing steps, thereby limiting the increase in manufacturing complexity despite the use of different materials.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces crystal defects and improves electrical characteristics by forming channel layers with reduced defect density and controlled dopant distribution, enhancing the performance and integration density of semiconductor devices.
Implementation Method 1
heating the substrate to convert the preliminary impurity region into an impurity region
Implementation Method 2
implanting dopants into a substrate to form a preliminary impurity region in the substrate
Implementation Method 3
sequentially forming a first epitaxial layer and a second epitaxial layer on a substrate
Data Source
AI summary
Semiconductor devices and methods of forming the same are provided. The methods may implanting dopants into a substrate to form a preliminary impurity region and heating the substrate to convert the preliminary impurity region into an impurity region. Heating the substrate may be performed at an ambient temperature of from about 800° C. to about 950° C. for from about 20 min to about 50 min. The method may also include forming first and second trenches in the impurity region to define an active fin and forming a first isolation layer and a second isolation layer in the first and second trenches, respectively. The first and second isolation layers may expose opposing sides of the active fin. The method may further include forming a gate insulation layer extending on the opposing sides and an upper surface of the active fin and forming a gate electrode traversing the active fin.