Semiconductor Device Internal Address Generation for Power Reduction
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Highly integrated semiconductor devices, such as DRAM, face challenges in reducing operation and standby current to achieve low power consumption, particularly in applications like cellular phones and notebook computers, where area-efficient solutions for internal control operations are needed.
Innovation Solution
A semiconductor system comprising a controller and a semiconductor device with a code signal generating unit and an internal address generating unit, which outputs code signals and generates internal address signals initialized to a specific combination, counted by a predetermined number of pulses, to perform refresh operations and reduce unnecessary counting, thereby minimizing power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by stationary object
If the internal address generating unit performs continuous counting operations during refresh and boot-up processes, then the address generation function is achieved, but power consumption increases due to unnecessary counting operations
Solution Approach 1:
The patent applies preliminary action by pre-storing code signals corresponding to different address signal combinations in a code signal generating unit. During refresh and boot-up operations, the system retrieves pre-computed code signals based on match results, avoiding the need to perform full counting operations from scratch. This preliminary preparation of code signals significantly reduces the computational burden and power consumption during these operations.
Solution Approach 2:
The patent uses copying by storing multiple copies of code signals in the code signal generating unit, each corresponding to a specific combination of address signals. When the internal address generating unit detects a match between current address signals and stored combinations, it copies the corresponding pre-stored code signal directly without re-computation. This copying mechanism eliminates redundant counting operations and reduces power consumption during refresh and boot-up processes.
2Productivity
If e-fuses are used to store information for internal control operations, then integration density is improved, but area occupied by e-fuses increases
Solution Approach 1:
The patent applies universality by designing the code signal generating unit to serve multiple functions: it stores code signals for refresh operations, boot-up operations, and general address generation. The same hardware structure and storage mechanisms are utilized across different operational modes, eliminating the need for separate dedicated circuits for each function. This multi-functional design improves integration density while minimizing the area required for internal control operations.
Data Source
AI summary
A semiconductor system includes a controller and a semiconductor device. The controller outputs pre-order address signals, post-order address signals, and an update signal including pulses periodically generated. The semiconductor device generates internal address signals counted by a predetermined number of times according to a combination of the pre-order address signals and a combination of the post-order address signals in response to a pulse of the update signal. The semiconductor device also performs a refresh operation according to a combination of the internal address signals.