Semiconductor Chip Adhesive Voids

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Solution Overview

Problem

Voids between the adhesive member and the semiconductor chip in semiconductor packages can lead to chip misalignment, incorrect wire bonding, and reduced reliability due to air expansion during subsequent hot processes.

Innovation Solution

Incorporating void removing parts in the insulation layer that extend from the chip's circuit area to its peripheral area, with various shapes such as grooves, openings, or lattice patterns to prevent void formation by allowing air discharge, and ensuring these parts correspond to fuse boxes and bonding pads for effective void removal.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Strength

If adhesive members are used to fix semiconductor chips to substrates, then chip attachment is achieved, but voids are trapped between the adhesive member and semiconductor chip

Engineering Contradiction:
Improvechip attachmentVSAvoidvoid formation
Core Design Contradiction:
StrengthVSObject-generated harmful factors

Solution Approach 1:

The patent applies preliminary action by forming protrusions on the adhesive member before chip attachment. These protrusions are pre-configured to extend into the chip's peripheral area, creating a mechanical interlock structure that prevents void formation during the subsequent bonding process. This preliminary structural preparation ensures that when the chip is attached, the adhesive naturally fills the spaces around the protrusions without trapping air voids.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent utilizes a porous-like structure through the protrusions on the adhesive member. These protrusions create a textured surface that allows the adhesive to penetrate and bond with the chip's peripheral area, similar to how porous materials allow fluid penetration. This structure ensures complete adhesive coverage and eliminates voids by allowing the adhesive to flow into all necessary spaces before curing.

Inventive Principle:
Principle #31Porous materials

2Strength

If voids are trapped between adhesive member and semiconductor chip, then chip attachment is maintained, but chip inclination occurs

Engineering Contradiction:
Improveadhesive bondingVSAvoidchip alignment
Core Design Contradiction:
StrengthVSStability of the object's composition

Solution Approach 1:

The protrusions are pre-formed on the adhesive member to extend into the chip's peripheral area before bonding occurs. This preliminary structural configuration ensures that when the chip is attached, the adhesive distributes evenly around the protrusions, preventing void formation that would cause inclination. The protrusions act as mechanical guides that maintain proper chip alignment during the bonding process.

Inventive Principle:
Principle #10Preliminary action

3Device complexity

If voids are trapped between adhesive member and semiconductor chip, then attachment structure is simplified, but wire bonding accuracy deteriorates

Engineering Contradiction:
Improveattachment structureVSAvoidwire bonding position
Core Design Contradiction:
Device complexityVSManufacturing precision

Solution Approach 1:

The protrusions are pre-configured on the adhesive member to extend into the chip's peripheral area, creating a structured adhesive pattern that guides proper chip placement. This preliminary structural preparation ensures that the chip aligns correctly with the substrate, which in turn ensures that wire bonding can be performed with high accuracy. The protrusions serve as mechanical references that maintain precise positioning throughout the manufacturing process.

Inventive Principle:
Principle #10Preliminary action

4Ease of manufacture

If voids are trapped between adhesive member and semiconductor chip, then packaging process is simplified, but package reliability deteriorates due to air expansion

Engineering Contradiction:
Improvepackaging processVSAvoidpackage stability
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The protrusions are pre-formed on the adhesive member to create a void-preventing structure before packaging. This preliminary structural preparation ensures that no voids are trapped during attachment, eliminating the source of air that would expand during subsequent hot processes. The design maintains manufacturing simplicity while ensuring reliability by preventing void formation at the source rather than requiring complex void removal processes later.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS7928535B2Semiconductor device and semiconductor package having the same
Publication Date: 2011.04.19 SK HYNIX INC
  • US7928535B2 patent drawing
  • US7928535B2 patent drawing
  • US7928535B2 patent drawing

AI summary

A semiconductor device having no voids and a semiconductor package using the same is described. The semiconductor device includes a semiconductor chip having a circuit section which is formed in a first area and a peripheral section which is formed in a second area defined around the first area, and an insulation layer covering the first and second areas and having at least one void removing part which extends from the first area to the second area to prevent a void from being formed.