Semiconductor Chip Adhesive Configuration for Warping Control

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Solution Overview

Problem

The challenge in stacking semiconductor chips is the warping of individual chips, which leads to increased gaps between adjacent chips, potentially causing peeling away from adhesives due to stress exceeding adhesive strength, resulting in connection failures and reduced manufacturing yield.

Innovation Solution

A semiconductor device design featuring a first adhesive with a larger layout area near the center and a second adhesive with a smaller layout area in corner regions, positioned farther from the center, providing higher rigidity near the center and higher elasticity in corners to stabilize gaps and prevent peeling.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Length of stationary object

If semiconductor chips are thinned for reducing device thickness, then device thickness is reduced, but warping of individual chips occurs leading to increased gaps between chips

Engineering Contradiction:
Improvedevice thicknessVSAvoidchip warping
Core Design Contradiction:
Length of stationary objectVSStability of the object's composition

Solution Approach 1:

The patent applies local quality by using two types of adhesives with different properties at different locations: a first adhesive with high rigidity is applied at the center of the chip to suppress warping, while a second adhesive with high elasticity is applied at the corners to accommodate stress and prevent peeling. This localized differentiation of adhesive properties directly addresses the warping issue caused by chip thinning.

Inventive Principle:
Principle #3Local quality

2Length of stationary object

If chips are flattened during assembly to reduce gaps, then gap between chips is reduced, but stress exceeds adhesive strength causing peeling at corners

Engineering Contradiction:
Improvegap between chipsVSAvoidadhesive bond strength
Core Design Contradiction:
Length of stationary objectVSStrength

Solution Approach 1:

The patent differentiates adhesive properties by location: the first adhesive with high rigidity at the center provides structural stability and maintains gap uniformity, while the second adhesive with high elasticity at the corners absorbs stress during flattening operations, preventing bond failure and peeling at these vulnerable locations.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent uses a composite adhesive system combining two adhesives with complementary properties - a rigid adhesive for structural support and an elastic adhesive for stress absorption. This composite approach allows the bonding system to simultaneously maintain gap uniformity and resist peeling under stress.

Inventive Principle:
Principle #40Composite materials

3Ease of manufacture

If uniform adhesive is applied across the entire chip surface, then manufacturing is simplified, but stress distribution is uneven causing peeling at corners

Engineering Contradiction:
Improveadhesive application simplicityVSAvoidbond reliability
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The patent implements local quality by applying different adhesives at different locations on the chip - the center receives a rigid adhesive for structural stability while corners receive an elastic adhesive for stress absorption. This location-specific approach improves bond reliability without significantly complicating the manufacturing process.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS10607964B2Semiconductor device
Publication Date: 2020.03.31 KIOXIA CORP
  • US10607964B2 patent drawing
  • US10607964B2 patent drawing
  • US10607964B2 patent drawing

AI summary

A semiconductor device includes a semiconductor chip in which a first bump is provided on a first surface, a plurality of first adhesives are provided on the first surface of the semiconductor chip, and a second adhesive is provided on the first surface of the semiconductor chip, and of which a layout area on the first surface is smaller than a layout area of the plurality of first adhesives. In comparison to a first adhesive that is farthest from the center or a moment of inertia of the first surface of the semiconductor chip among the plurality of the first adhesives, the second adhesive is provided farther from the center or the moment of inertia of the semiconductor chip.